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Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81116 91177308-0d34-0410-b5e6-96231b3b80d8
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about by icc (#593, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81115 91177308-0d34-0410-b5e6-96231b3b80d8
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1. DUPMAX is defined in regcomp.c, no need to redefine it in regutils.
2. MSVC doesn't like snprintf, use _snprintf instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81114 91177308-0d34-0410-b5e6-96231b3b80d8
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(#411). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81113 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81112 91177308-0d34-0410-b5e6-96231b3b80d8
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doesn't warn about unreachable instructions. Patch
by Erick Tryzelaar (#111).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81110 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81108 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81107 91177308-0d34-0410-b5e6-96231b3b80d8
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icc (#177, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81106 91177308-0d34-0410-b5e6-96231b3b80d8
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- I think there are more instances of this, but I think they are fixed in Dan's
incoming patch. This one was preventing me from doing a bugpoint reduction
though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81103 91177308-0d34-0410-b5e6-96231b3b80d8
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tests significantly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81101 91177308-0d34-0410-b5e6-96231b3b80d8
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breaks MiniSAT on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81098 91177308-0d34-0410-b5e6-96231b3b80d8
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Do not use DenseMap operator[] because it inserts new entry if lookup fails. Use find() to check an entry in a DenseMap first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81058 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81055 91177308-0d34-0410-b5e6-96231b3b80d8
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MDNode's operand list does not include all elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81045 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81044 91177308-0d34-0410-b5e6-96231b3b80d8
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a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81040 91177308-0d34-0410-b5e6-96231b3b80d8
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(See http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090831/086219.html)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81007 91177308-0d34-0410-b5e6-96231b3b80d8
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into llvm/ADT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81001 91177308-0d34-0410-b5e6-96231b3b80d8
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Constant uniquing tables. This allows distinct ConstantExpr objects
with the same operation and different flags.
Even though a ConstantExpr "a + b" is either always overflowing or
never overflowing (due to being a ConstantExpr), it's still necessary
to be able to represent it both with and without overflow flags at
the same time within the IR, because the safety of the flag may
depend on the context of the use. If the constant really does overflow,
it wouldn't ever be safe to use with the flag set, however the use
may be in code that is never actually executed.
This also makes it possible to merge all the flags tests into a single test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80998 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80997 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80994 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80993 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80978 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80976 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80971 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80970 91177308-0d34-0410-b5e6-96231b3b80d8
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introduced regressions in the Ocaml bindings tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80969 91177308-0d34-0410-b5e6-96231b3b80d8
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D test/Analysis/Profiling
--- Reverse-merging r80907 into '.':
U lib/Analysis/ProfileInfoLoaderPass.cpp
Attempt to remove failure in the self-hosting build bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80966 91177308-0d34-0410-b5e6-96231b3b80d8
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FastISel to recognize this pattern and emit a floating-point
negation using xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80963 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80962 91177308-0d34-0410-b5e6-96231b3b80d8
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(i.e., there are no local variables and stuff), we still need to output FDE
information for the pushed registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80960 91177308-0d34-0410-b5e6-96231b3b80d8
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and exact flags. Because ConstantExprs are uniqued, creating an
expression with this flag causes all expressions with the same operands
to have the same flag, which may not be safe. Add, sub, mul, and sdiv
ConstantExprs are usually folded anyway, so the main interesting flag
here is inbounds, and the constant folder already knows how to set the
inbounds flag automatically in most cases, so there isn't an urgent need
for the API support.
This can be reconsidered in the future, but for now just removing these
API bits eliminates a source of potential trouble with little downside.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80959 91177308-0d34-0410-b5e6-96231b3b80d8
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wasn't doing the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80958 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80956 91177308-0d34-0410-b5e6-96231b3b80d8
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for the complicated case where one register is tied to multiple destinations.
This avoids the extra scan of instruction operands that was introduced by
my recent change. I also pulled some code out into a separate
TryInstructionTransform method, added more comments, and renamed some
variables.
Besides all those changes, this takes care of a FIXME in the code regarding
an assumption about there being a single tied use of a register when
converting to a 3-address form. I'm not aware of cases where that assumption
is violated, but the code now only attempts to transform an instruction,
either by commuting its operands or by converting to a 3-address form,
for the simple case where there is a single pair of tied operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80945 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80942 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80941 91177308-0d34-0410-b5e6-96231b3b80d8
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swapping the operands if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80940 91177308-0d34-0410-b5e6-96231b3b80d8
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- when transforming a vector shift of a non-immediate scalar shift amount, zero
extend the i32 shift amount to i64 since the vector shift reads 64 bits
- when transforming i16 vectors to use a vector shift, zero extend i16 shift amount
- improve the code quality in some cases when transforming vectors to use a vector shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80935 91177308-0d34-0410-b5e6-96231b3b80d8
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disabling the use of 16-bit operations on x86. This doesn't yet work for
inline asms with 16-bit constraints, vectors with 16-bit elements,
trampoline code, and perhaps other obscurities, but it's enough to try
some experiments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80930 91177308-0d34-0410-b5e6-96231b3b80d8
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from MCAsmLexer.h in preparation of supporting other targets. Changed the
X86AsmParser code to reflect this by removing AsmLexer::LexPercent and looking
for AsmToken::Percent when parsing in places that used AsmToken::Register.
Then changed X86ATTAsmParser::ParseRegister to parse out registers as an
AsmToken::Percent followed by an AsmToken::Identifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80929 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80928 91177308-0d34-0410-b5e6-96231b3b80d8
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that these passes are properly preserved.
Fix several transformation passes that claimed to preserve LoopSimplify
form but weren't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80926 91177308-0d34-0410-b5e6-96231b3b80d8
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LoopSimplify form, which is currently only available on Loops (and
not MachineLoops). Also, move the code out of the header file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80923 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of a bool argument, and to do the dominator check itself.
This makes it eaiser to use when DominatorTree information is
available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80920 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80919 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80918 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80917 91177308-0d34-0410-b5e6-96231b3b80d8
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memcpy calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80915 91177308-0d34-0410-b5e6-96231b3b80d8
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