| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-... | Chris Lattner | 2006-04-28 | 1 | -7/+0 |
| * | I can't spell: Register, not Regsiter. | Evan Cheng | 2006-04-28 | 4 | -6/+6 |
| * | Implemented x86 inline asm b, h, w, k modifiers. | Evan Cheng | 2006-04-28 | 4 | -1/+249 |
| * | Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll | Chris Lattner | 2006-04-28 | 1 | -1/+1 |
| * | Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll | Chris Lattner | 2006-04-28 | 1 | -0/+4 |
| * | Initial caller side support (for CCC only, not FastCC) of 128-bit vector | Evan Cheng | 2006-04-28 | 1 | -7/+73 |
| * | Bare-bone X86 inline asm printer support. | Evan Cheng | 2006-04-28 | 4 | -2/+66 |
| * | Remove the temporary option: -no-isel-fold-inflight | Evan Cheng | 2006-04-28 | 1 | -11/+0 |
| * | Implement four-wide shuffle with 2 shufps if no more than two elements come | Evan Cheng | 2006-04-28 | 1 | -2/+47 |
| * | Fix PR743: emit -help output of a tool to cout, not cerr. | Chris Lattner | 2006-04-28 | 1 | -20/+20 |
| * | TargetLowering::LowerArguments should return a VBIT_CONVERT of | Evan Cheng | 2006-04-28 | 2 | -17/+15 |
| * | Mapping of physregs can make it so that the designated and input physregs are | Chris Lattner | 2006-04-28 | 1 | -0/+13 |
| * | Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll | Chris Lattner | 2006-04-28 | 1 | -2/+3 |
| * | Use movaps instead of movapd for spill / restore. | Evan Cheng | 2006-04-28 | 1 | -2/+2 |
| * | Added a temporary option -no-isel-fold-inflight to control whether a "inflight" | Evan Cheng | 2006-04-28 | 1 | -1/+12 |
| * | When we have a two-address instruction where the input cannot be clobbered | Chris Lattner | 2006-04-28 | 1 | -26/+64 |
| * | Add a note | Chris Lattner | 2006-04-28 | 1 | -0/+8 |
| * | Add a note | Chris Lattner | 2006-04-27 | 1 | -0/+44 |
| * | Add support for inserting undef into a vector. This implements | Chris Lattner | 2006-04-27 | 1 | -3/+14 |
| * | Make x86 isel lowering produce tailcall nodes. They are match to normal calls | Evan Cheng | 2006-04-27 | 2 | -1/+17 |
| * | A couple of new entries. | Evan Cheng | 2006-04-27 | 1 | -0/+37 |
| * | Support for passing 128-bit vector arguments via XMM registers. | Evan Cheng | 2006-04-27 | 1 | -27/+97 |
| * | Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses | Evan Cheng | 2006-04-27 | 1 | -3/+16 |
| * | Oops | Evan Cheng | 2006-04-27 | 1 | -1/+1 |
| * | Bug fix: not updating NumIntRegs. | Evan Cheng | 2006-04-27 | 1 | -60/+65 |
| * | Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and | Chris Lattner | 2006-04-27 | 1 | -1/+29 |
| * | - Clean up formal argument lowering code. Prepare for vector pass by value work. | Evan Cheng | 2006-04-27 | 2 | -215/+237 |
| * | Fix some nondeterminstic behavior in the mem2reg pass that (in addition to | Chris Lattner | 2006-04-27 | 1 | -20/+38 |
| * | Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't | Chris Lattner | 2006-04-26 | 1 | -0/+25 |
| * | Fix fastcc failures. | Evan Cheng | 2006-04-26 | 1 | -0/+3 |
| * | Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. | Evan Cheng | 2006-04-26 | 2 | -80/+177 |
| * | Don't forget return void. | Evan Cheng | 2006-04-25 | 1 | -0/+3 |
| * | Keep the stack from on darwin 16-byte aligned. This fixes many JIT | Nate Begeman | 2006-04-25 | 1 | -2/+13 |
| * | Separate LowerOperation() into multiple functions, one per opcode. | Evan Cheng | 2006-04-25 | 2 | -1135/+1213 |
| * | slightly more useful error message | Andrew Lenharth | 2006-04-25 | 1 | -2/+3 |
| * | better c99 struct handling | Andrew Lenharth | 2006-04-25 | 1 | -2/+1 |
| * | Fix a typo. | Evan Cheng | 2006-04-25 | 1 | -1/+1 |
| * | Fix a warning | Nate Begeman | 2006-04-25 | 1 | -1/+1 |
| * | No functionality changes, but cleaner code with correct comments. | Nate Begeman | 2006-04-25 | 1 | -34/+40 |
| * | Explicitly specify result type for def : Pat<> patterns (if it produces a vector | Evan Cheng | 2006-04-25 | 1 | -45/+47 |
| * | Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is | Evan Cheng | 2006-04-24 | 1 | -12/+44 |
| * | Add a new entry. | Evan Cheng | 2006-04-24 | 1 | -0/+32 |
| * | Special case handling two wide build_vector(0, x). | Evan Cheng | 2006-04-24 | 1 | -4/+4 |
| * | Some missing movlps, movhps, movlpd, and movhpd patterns. | Evan Cheng | 2006-04-24 | 1 | -6/+14 |
| * | A little bit more build_vector enhancement for v8i16 cases. | Evan Cheng | 2006-04-24 | 1 | -42/+105 |
| * | Remove a completed entry. | Evan Cheng | 2006-04-24 | 1 | -55/+0 |
| * | MakeMIInst() should handle jump table index operands. | Evan Cheng | 2006-04-24 | 1 | -0/+3 |
| * | Add a note | Chris Lattner | 2006-04-23 | 1 | -0/+7 |
| * | MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 | Evan Cheng | 2006-04-23 | 1 | -2/+7 |
| * | Fix the updating of the machine CFG when a PHI node was in a successor of | Nate Begeman | 2006-04-23 | 1 | -5/+10 |
