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* Optimize away insertelement of an undef value. This shows up inBob Wilson2010-05-191-0/+4
| | | | | | | | test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code because the coalescer cleans it up. Radar 7998853. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://7986634 - match instruction opcodes case insensitively.Chris Lattner2010-05-191-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104183 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable preserving debug information through post-RA schedulingJim Grosbach2010-05-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104175 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the post-RA instruction scheduler to handle instructions referenced byJim Grosbach2010-05-191-3/+3
| | | | | | | more than one dbg_value instruction. rdar://7759363 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104174 91177308-0d34-0410-b5e6-96231b3b80d8
* Code clean up.Evan Cheng2010-05-191-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104173 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r104165.Devang Patel2010-05-192-5/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104172 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for partial redefs to the fast register allocator.Jakob Stoklund Olesen2010-05-191-20/+18
| | | | | | | | | | A partial redef now triggers a reload if required. Also don't add <imp-def,dead> operands for physical superregisters. Kill flags are still treated as full register kills, and <imp-use,kill> operands are added for physical superregisters as before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104167 91177308-0d34-0410-b5e6-96231b3b80d8
* There is no need to maintain InsnsBeginScopeSet separately. Devang Patel2010-05-192-13/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104165 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineInstr::readsVirtualRegister() in preparation for proper handling ofJakob Stoklund Olesen2010-05-191-1/+24
| | | | | | | | | | | | | | | | | | partial redefines. We are going to treat a partial redefine of a virtual register as a read-modify-write: %reg1024:6 = OP Unless the register is fully clobbered: %reg1024:6 = OP, %reg1024<imp-def> MachineInstr::readsVirtualRegister() knows the difference. The first case is a read, the second isn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
* Code refactoring: pull SchedPreference enum from TargetLowering.h to ↵Evan Cheng2010-05-198-10/+10
| | | | | | TargetMachine.h and put it in its own namespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
* TwoAddressInstructionPass doesn't really know how to merge live intervals whenJakob Stoklund Olesen2010-05-191-1/+6
| | | | | | | | lowering REG_SEQUENCE instructions. Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104146 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: report an error if a child process segfaults.Mikhail Glushenkov2010-05-191-1/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104145 91177308-0d34-0410-b5e6-96231b3b80d8
* When expanding a vector_shuffle, the element type may not be legal and mayBob Wilson2010-05-191-0/+2
| | | | | | | | | need to be promoted. The BUILD_VECTOR and EXTRACT_VECTOR_ELT nodes generated here already allow the promoted type to be used without further changes, so just do the promotion. This fixes part of pr7167. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104141 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode().Daniel Dunbar2010-05-191-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104122 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid sameDaniel Dunbar2010-05-192-0/+17
| | | | | | | prefix byte problem as in r104062. - As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104120 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r andDaniel Dunbar2010-05-191-3/+5
| | | | | | CALL64pcrel32, for the same reason. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104116 91177308-0d34-0410-b5e6-96231b3b80d8
* t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to ↵Evan Cheng2010-05-192-0/+2
| | | | | | hoist more loads during machine LICM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104115 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable.Evan Cheng2010-05-191-12/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104114 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate.Daniel Dunbar2010-05-191-9/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104112 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ↵Evan Cheng2010-05-195-35/+37
| | | | | | do not have other un-modeled side effects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104111 91177308-0d34-0410-b5e6-96231b3b80d8
* Target instruction selection should copy memoperands.Evan Cheng2010-05-191-3/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104110 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, toDaniel Dunbar2010-05-191-6/+8
| | | | | | avoid same prefix byte problem as in r104062. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104108 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark a few more pattern-less instructions with neverHasSideEffects. This is ↵Evan Cheng2010-05-193-0/+12
| | | | | | especially important on instructions like t2LEApcreal which are prime candidate for machine LICM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104102 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment explaining why this code uses Append mode.Dan Gohman2010-05-191-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104095 91177308-0d34-0410-b5e6-96231b3b80d8
* Intrinsics which do a vector compare (results are all zero or all ones) are ↵Evan Cheng2010-05-191-6/+75
| | | | | | | | | | | modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that. Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code for picking integer arithmetic with immediateDan Gohman2010-05-191-15/+32
| | | | | | | | opcodes into a helper function. This fixes a few places in the code which were not properly selecting the 8-bit-immediate opcodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104091 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment.Dan Gohman2010-05-181-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104089 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the predicate which checks for non-sensical formulae which haveDan Gohman2010-05-181-4/+5
| | | | | | | constants in registers which partially cancel out their immediate fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104088 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code for recomputing an LSRUse's Regs set after someDan Gohman2010-05-181-17/+40
| | | | | | | | of its formulae have been removed into a helper function, and also teach it how to update the RegUseTracker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104087 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash when debugging the coalescer. DebugValue instructions are notBob Wilson2010-05-181-4/+13
| | | | | | | in the coalescer's instruction map. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104086 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out code for estimating search space complexity into a helperDan Gohman2010-05-181-22/+26
| | | | | | | function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104082 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some more debug output.Dan Gohman2010-05-181-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104080 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code for deleting a formula from an LSRUse intoDan Gohman2010-05-181-4/+9
| | | | | | | a helper function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104079 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some debug output more informative.Dan Gohman2010-05-181-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104078 91177308-0d34-0410-b5e6-96231b3b80d8
* Print an error message in Formula::print if the HasBaseReg flagDan Gohman2010-05-181-0/+7
| | | | | | | | is inconsistent with the BaseRegs field. It's not print's job to assert on an invalid condition, but it can make one more obvious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104077 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename RegUseTracker's RegUses member to RegUsesMap to avoidDan Gohman2010-05-181-7/+7
| | | | | | | confusion with LSRInstance's RegUses member. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104076 91177308-0d34-0410-b5e6-96231b3b80d8
* Remember to update VirtRegLastUse when spilling without killing before a call.Jakob Stoklund Olesen2010-05-181-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104074 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach mode load folding and unfolding code about CMP32ri8 and friends.Dan Gohman2010-05-181-3/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104068 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't eliminate frame pointers from leaf functions if "--disable-fp-elim" isBill Wendling2010-05-181-1/+1
| | | | | | | specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104066 91177308-0d34-0410-b5e6-96231b3b80d8
* When converting a test to a cmp to fold a load, use the cmp that has anDan Gohman2010-05-181-3/+3
| | | | | | | 8-bit immediate field rather than one with a wider immediate field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104064 91177308-0d34-0410-b5e6-96231b3b80d8
* make mcinstlower remove all but the first operand to CALL64pcrel32.Chris Lattner2010-05-181-1/+11
| | | | | | | | | | | | | The register use operands (e.g. the first argument is passed in a register) is currently being modeled as a normal register use, instead of correctly being an implicit use. This causes the operand to get propagated onto the mcinst, which was causing the encoder to emit a rex prefix byte, which generates an invalid call. This fixes rdar://7998435 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104062 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink dag combine's post index load / store code that swap base ptr and index ↵Evan Cheng2010-05-182-5/+15
| | | | | | into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement EmitTBSSSymbol for MachOStreamer.Eric Christopher2010-05-181-5/+7
| | | | | | | Fixes build failure as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104059 91177308-0d34-0410-b5e6-96231b3b80d8
* Make EmitTBSSSymbol take a section argument so that we can find it later.Eric Christopher2010-05-183-9/+15
| | | | | | | Fix up callers and users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104057 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly handle multiple definitions of a virtual register in the sameJakob Stoklund Olesen2010-05-181-21/+41
| | | | | | | | | | | | | | | instruction. This can happen on ARM: >> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0 Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031* Killing last use: %reg1028 Allocating %reg1035 from QPR Assigning %reg1035 to Q1 << %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104056 91177308-0d34-0410-b5e6-96231b3b80d8
* Continuously refine the register class of REG_SEQUENCE def with all the ↵Evan Cheng2010-05-181-2/+3
| | | | | | source registers and sub-register indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104051 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR7162: Use source register classes and sub-indices to determine the ↵Evan Cheng2010-05-181-4/+6
| | | | | | correct register class of the definitions of REG_SEQUENCE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8
* Incorporate Daniel's suggestion and use !isdigit(CurPtr[0]) and notKevin Enderby2010-05-181-1/+1
| | | | | | | | CurPtr[0] == '\n' when testing the character after a "0b" when looking to see if it part of a something like "jmp 0b". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104039 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed the problem with a branch to "0b" that was not parsed by llvm-mcKevin Enderby2010-05-181-1/+0
| | | | | | | | correctly. The Lexer was incorrectly eating the newline casusing it to branch to address 0. Updated the test case to use a "0:" label and a branch to "0b". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104038 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the machine code verifier to use getSubRegisterRegClass().Jakob Stoklund Olesen2010-05-181-2/+5
| | | | | | The old approach was wrong. It had an off-by-one error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104034 91177308-0d34-0410-b5e6-96231b3b80d8
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