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* make PIC16 create its own custom MCSection.Chris Lattner2009-08-082-1/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
* make target-specific TLOF impls (except PIC16) create target-specificChris Lattner2009-08-082-5/+5
| | | | | | | MCSection instances. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
* stub out PECOFF/MachO/ELF MCSection classesChris Lattner2009-08-081-2/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78499 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.Chris Lattner2009-08-085-31/+28
| | | | | | | | | A TAI hook is appropriate in this case because this is just an asm syntax issue, not a semantic difference. TLOF should model the semantics of the section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().Jakob Stoklund Olesen2009-08-081-1/+3
| | | | | | | | Blackfin supports and/or/xor on i32 but not on i16. Teach DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes after legalize ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
* give pic16 a target-specific section creation name tooChris Lattner2009-08-082-35/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
* now that getOrCreateSection is all object-file specific,Chris Lattner2009-08-083-152/+133
| | | | | | | | give the impls an object-file-specific name. In the future they can take different arguments etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
* sink getOrCreateSection down into all the object file implementations,Chris Lattner2009-08-083-8/+34
| | | | | | | now that they create *all* the sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
* Some ProfileInfo cleanups.Daniel Dunbar2009-08-082-1/+2
| | | | | | | - Part of optimal static profiling patch sequence by Andreas Neustifter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78485 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a basic static ProfileInfo provider (ProfileEstimatorPass).Daniel Dunbar2009-08-082-0/+237
| | | | | | | - Part of optimal static profiling patch sequence by Andreas Neustifter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78484 91177308-0d34-0410-b5e6-96231b3b80d8
* Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 ↵Bruno Cardoso Lopes2009-08-081-2/+2
| | | | | | | | | | instructions, since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since it handles both word absolute relocations in the same way git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
* More ProfileInfo improvements.Daniel Dunbar2009-08-085-68/+97
| | | | | | | | | | | | | - Part of optimal static profiling patch sequence by Andreas Neustifter. - Store edge, block, and function information separately for each functions (instead of in one giant map). - Return frequencies as double instead of int, and use a sentinel value for missing information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78477 91177308-0d34-0410-b5e6-96231b3b80d8
* ELF improvements:Bruno Cardoso Lopes2009-08-083-58/+94
| | | | | | | | | | | | | Handle large integers, x86_fp80, ConstantAggregateZero, and two more ConstantExpr: GetElementPtr and IntToPtr Set SHF_MERGE bit for mergeable strings Avoid zero initialized strings to be classified as a bss symbol Don't allow common symbols to be classified as STB_WEAK Add a constant to be used as a global value offset in data relocations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78476 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMakeDaniel Dunbar2009-08-081-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean out per-function data after the machine code verifier is done with it.Jakob Stoklund Olesen2009-08-081-0/+8
| | | | | | | | | | | | | | | Also don't dereference old pointers after they have been deleted causing random crashes when enabling the machine code verifier. Ahem... I have not included a test case for the crash. It hapened when enabling the verifier on CodeGen/X86/2009-08-06-branchfolder-crash.ll. The crash depends on an MBB being allocated at the same address as a previously deleted MBB. I don't think that can be reproduced reliably. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78472 91177308-0d34-0410-b5e6-96231b3b80d8
* Add insert_elt / extract_elt patterns for v4f32 stuff.Anton Korobeynikov2009-08-081-19/+30
| | | | | | Did anyone tests v4f32 ever? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
* Lane number should be printed w/o hashAnton Korobeynikov2009-08-082-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
* Use VLDM / VSTM to spill/reload 128-bit Neon registersAnton Korobeynikov2009-08-085-10/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the machine code verifier to keep up with the scavenger.Jakob Stoklund Olesen2009-08-081-12/+22
| | | | | | | | | * Cleaner handling of <undef>. * <def> takes precedence over <def,dead>. * Implement the OK-to-redefine-a-register-that-was- live-in-but-has-not-been-used-before rule. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78467 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the ↵Jakob Stoklund Olesen2009-08-082-38/+9
| | | | | | | | | | | | | | | | mistaken commit r77904. Now there is no special treatment of instructions that redefine part of a super-register. Instead, the super-register is marked with <imp-use,kill> and <imp-def>. For instance, from LowerSubregs on ARM: subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5 subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def> subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6 subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78466 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify RegScavenger::forward a bit more.Jakob Stoklund Olesen2009-08-081-65/+53
| | | | | | | | | | | Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
* move this fp select into a patternAndrew Lenharth2009-08-082-22/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Improve match code.Daniel Dunbar2009-08-081-23/+1
| | | | | | | | | | | | | | | - This doesn't actually improve the algorithm (its still linear), but the generated (match) code is now fairly compact and table driven. Still need a generic string matcher. - The table still needs to be compressed, this is quite simple to do and should shrink it to under 16k. - This also simplifies and restructures the code to make the match classes more explicit, in anticipation of resolving ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,Bob Wilson2009-08-082-16/+70
| | | | | | | so I generalized the class for VTRN in the .td file to handle all 3 of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Neon VTRN instructions. For now, anyway, these are selectedBob Wilson2009-08-082-0/+48
| | | | | | | | | directly from the intrinsics produced by the frontend. If it is more convenient to have a custom DAG node for using these to implement shuffles, we can add that later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a skeleton Thumb2 instruction size reduction pass.Evan Cheng2009-08-082-1/+219
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
* Code refactoring. No functionality change.Evan Cheng2009-08-084-22/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
* tADDhirr should target GPR, not tGPR.Evan Cheng2009-08-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
* I can type.Evan Cheng2009-08-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
* make printInstruction return void since its result is omitted. Make the Chris Lattner2009-08-0813-14/+14
| | | | | | | error condition get trapped with an assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some -Asserts unused variable warnings.Daniel Dunbar2009-08-082-6/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78447 91177308-0d34-0410-b5e6-96231b3b80d8
* don't check the result of printInstruction anymore.Chris Lattner2009-08-085-19/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78444 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not generate 32-bit call on win64 when imm does not fitAnton Korobeynikov2009-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
* code cleanupChris Lattner2009-08-071-20/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78432 91177308-0d34-0410-b5e6-96231b3b80d8
* Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a bunch of now-dead crud from the asmprinter and TAI interfaces.Chris Lattner2009-08-072-34/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78428 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix copy-pasto.Andreas Bolka2009-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78426 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the stuffAnton Korobeynikov2009-08-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78425 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out some of recent register scavenger change by John Mosby. It broke a ↵Evan Cheng2009-08-071-27/+14
| | | | | | number of ARM tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78421 91177308-0d34-0410-b5e6-96231b3b80d8
* avoid this libcall with long inline expansionAndrew Lenharth2009-08-071-1/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78420 91177308-0d34-0410-b5e6-96231b3b80d8
* 2 more vdup.32 casesAnton Korobeynikov2009-08-072-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
* A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR.Evan Cheng2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78418 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy upChris Lattner2009-08-071-7/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78416 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement.Bill Wendling2009-08-071-45/+78
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78411 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.Evan Cheng2009-08-072-3/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
* MSVC warning fixes; patch by Stein Roger!Daniel Dunbar2009-08-071-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78405 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Tweaks in response to feedback.Daniel Dunbar2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
* To catch bugs like the one fixed inJeffrey Yasskin2009-08-071-13/+18
| | | | | | | | | | | | | | http://llvm.org/viewvc/llvm-project?view=rev&revision=78127, I'm changing the ExecutionEngine's global mappings to hold AssertingVH<const GlobalValue>. That way, if unregistering a mapping fails to actually unregister it, we'll get an assert. Running the jit nightly tests didn't uncover any actual instances of the problem. This also uncovered the fact that AssertingVH<const X> didn't work, so I fixed that too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78400 91177308-0d34-0410-b5e6-96231b3b80d8
* This is done.Evan Cheng2009-08-071-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78399 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode.Evan Cheng2009-08-072-8/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78398 91177308-0d34-0410-b5e6-96231b3b80d8
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