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* Fix the trunc(load) case, finally allowing crafty and povray to passChris Lattner2005-10-131-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23718 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some bugs in (sext (load x))Chris Lattner2005-10-131-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23717 91177308-0d34-0410-b5e6-96231b3b80d8
* When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chainChris Lattner2005-10-131-2/+28
| | | | | | | is also legal. Add support for ExpandOp'ing raw EXTLOADs too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23716 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to LegalizeChris Lattner2005-10-131-0/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23715 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the remaining DAGCombiner issues pointed out by sabre. This should fixNate Begeman2005-10-131-16/+11
| | | | | | | the remainder of the failures introduced by my patch last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23714 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a minor bug in the dag combiner that broke pcompress2 and some otherChris Lattner2005-10-131-4/+3
| | | | | | | tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23713 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support to Legalize for expanding i64 sextload/zextload into hi and loNate Begeman2005-10-131-0/+35
| | | | | | | | parts. This should fix the crafty and signed long long unit test failure on x86 last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23711 91177308-0d34-0410-b5e6-96231b3b80d8
* Inhibit instructions from being pushed before function calls. This willJim Laskey2005-10-131-3/+55
| | | | | | | minimize unnecessary spilling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23710 91177308-0d34-0410-b5e6-96231b3b80d8
* Move some Legalize functionality over to the DAGCombiner where it belongs.Nate Begeman2005-10-133-149/+79
| | | | | | | Kill some dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a potential bug with two combine-to's back to back that chris pointedNate Begeman2005-10-121-4/+14
| | | | | | | | | | | out, where after the first CombineTo() call, the node the second CombineTo wishes to replace may no longer exist. Fix a very real bug with the truncated load optimization on little endian targets, which do not need a byte offset added to the load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23704 91177308-0d34-0410-b5e6-96231b3b80d8
* More cool stuff for the dag combiner. We can now finally handle thingsNate Begeman2005-10-121-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | like turning: _foo: fctiwz f0, f1 stfd f0, -8(r1) lwz r2, -4(r1) rlwinm r3, r2, 0, 16, 31 blr into _foo: fctiwz f0,f1 stfd f0,-8(r1) lhz r3,-2(r1) blr Also removed an unncessary constraint from sra -> srl conversion, which should take care of hte only reason we would ever need to handle sra in MaskedValueIsZero, AFAIK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8
* Finally committing to the new scheduler. Still -sched=none by default.Jim Laskey2005-10-121-249/+125
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23702 91177308-0d34-0410-b5e6-96231b3b80d8
* Added graphviz/gv support for MF.Jim Laskey2005-10-121-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23700 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix (hopefully the last) issue where LSR is nondeterminstic. When pullingChris Lattner2005-10-111-8/+14
| | | | | | | | out CSE's of base expressions it could build a result whose order was nondet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23698 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix another problem where LSR was being nondeterminstic. Also remove elementsChris Lattner2005-10-111-10/+16
| | | | | | | from the end of a vector instead of the beginning git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23697 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix another lsr-is-nondeterministic caseChris Lattner2005-10-111-6/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23695 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.llChris Lattner2005-10-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23694 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUBChris Lattner2005-10-111-3/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23693 91177308-0d34-0410-b5e6-96231b3b80d8
* clean up some corner casesChris Lattner2005-10-101-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23692 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement trivial DSE. If two stores are neighbors and store to the sameChris Lattner2005-10-101-0/+29
| | | | | | | | location, replace them with a new store of the last value. This occurs in the same neighborhood in 197.parser, speeding it up about 1.5% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23691 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for CombineTo, allowing the dag combiner to replace nodes withChris Lattner2005-10-101-2/+56
| | | | | | | | | | | | | | | | | | | | | multiple results. Use this support to implement trivial store->load forwarding, implementing CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and can be extended in the future, it is still useful. For example, it speeds up 197.parser by 6.2% by avoiding an LSU reject in xalloc: stw r6, lo16(l5_end_of_array)(r2) addi r2, r5, -4 stwx r5, r4, r2 - lwzx r5, r4, r2 - rlwinm r5, r5, 0, 0, 30 stwx r5, r4, r2 lwz r2, -4(r4) ori r2, r2, 1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23690 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner several new tricks, teaching it how to turnNate Begeman2005-10-101-32/+46
| | | | | | | | sext_inreg into zext_inreg based on the signbit (fires a lot), srem into urem, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23688 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix commentChris Lattner2005-10-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ISD::ADD to MaskedValueIsZeroChris Lattner2005-10-101-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23685 91177308-0d34-0410-b5e6-96231b3b80d8
* This function is now deadChris Lattner2005-10-101-110/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23684 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable Nate's excellent DAG combiner work by default. This allows theChris Lattner2005-10-102-558/+18
| | | | | | | removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23682 91177308-0d34-0410-b5e6-96231b3b80d8
* These definitions have been moved to common code.Chris Lattner2005-10-101-199/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull DAG ISel generation nodes out of the PowerPC backend to where theyChris Lattner2005-10-102-89/+216
| | | | | | | | can be used by other targets. For those targets that want to use it, have at. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
* add a todo for something I noticedChris Lattner2005-10-091-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23679 91177308-0d34-0410-b5e6-96231b3b80d8
* (X & Y) & C == 0 if either X&C or Y&C are zeroChris Lattner2005-10-092-3/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23678 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MaskedValueIsZero a bit more aggressiveChris Lattner2005-10-091-3/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23677 91177308-0d34-0410-b5e6-96231b3b80d8
* This seems useful from the original patch that added the function. If there ↵Andrew Lenharth2005-10-092-0/+21
| | | | | | is a reason it is not useful on a RISC type target, let me know and I will pull it out git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix funky xcode indentationChris Lattner2005-10-091-50/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23674 91177308-0d34-0410-b5e6-96231b3b80d8
* Hrm, you didn't see this.Chris Lattner2005-10-091-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23673 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a source of non-determinism in the backend: the order of processingChris Lattner2005-10-091-6/+25
| | | | | | | | IV strides dependend on the pointer order of the strides in memory. Non-determinism is bad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23672 91177308-0d34-0410-b5e6-96231b3b80d8
* When emiting a CopyFromReg and the source is already a vreg, do not botherChris Lattner2005-10-091-27/+31
| | | | | | | | | | | | creating a new vreg and inserting a copy: just use the input vreg directly. This speeds up the compile (e.g. about 5% on mesa with a debug build of llc) by not adding a bunch of copies and vregs to be coallesced away. On mesa, for example, this reduces the number of intervals from 168601 to 129040 going into the coallescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23671 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable formation of rlwinm instructions from SRA bases. This fixesChris Lattner2005-10-091-2/+2
| | | | | | | | | | the 177.mesa failure from last night, and fixes the CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added. If this code cannot be fixed, it should be removed for good, but I'll leave it to Nate to decide its fate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove another unused file. Preparing for the great "enable i64 on ppc32"Nate Begeman2005-10-081-35/+0
| | | | | | | merge, and using subtarget info for ptr size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a file that is no longer usedNate Begeman2005-10-081-46/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
* Lo and behold, the last bits of SelectionDAG.cpp have been moved over.Nate Begeman2005-10-081-6/+150
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23665 91177308-0d34-0410-b5e6-96231b3b80d8
* When preselecting, favor things that have low depth to select first. ThisChris Lattner2005-10-071-5/+8
| | | | | | | | | is faster and uses less stack space. This reduces our stack requirement enough to compile sixtrack, and though it's a hack, should be enough until we switch to iterative isel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
* remove debugging codeChris Lattner2005-10-071-5/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23663 91177308-0d34-0410-b5e6-96231b3b80d8
* implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits throughChris Lattner2005-10-072-1/+41
| | | | | | | C-X's git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23662 91177308-0d34-0410-b5e6-96231b3b80d8
* fix indentationChris Lattner2005-10-071-57/+57
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23660 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn sdivs into udivs when we can prove the sign bits are clear. ThisChris Lattner2005-10-072-0/+21
| | | | | | | implements CodeGen/PowerPC/div-2.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23659 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove useless variable.Jeff Cohen2005-10-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23656 91177308-0d34-0410-b5e6-96231b3b80d8
* add a hack to work around broken VC++ scoping rules. Thx to JeffC for pointingChris Lattner2005-10-071-13/+13
| | | | | | | this out to me git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23655 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a CQ regression from my patch to split F32/F64 into seperate registerChris Lattner2005-10-071-1/+2
| | | | | | | | classes on PPC. We were emitting fmr instructions to do fp extensions, which weren't getting coallesced. This fixes Regression/CodeGen/PowerPC/fpcopy.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix CodeGen/Generic/bool-to-double.llChris Lattner2005-10-071-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.Chris Lattner2005-10-061-106/+111
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
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