aboutsummaryrefslogtreecommitdiffstats
path: root/lib
Commit message (Collapse)AuthorAgeFilesLines
* Avoid some 's' 16-bit instruction which partially update CPSRBob Wilson2011-04-194-86/+182
| | | | | | | (and add false dependency) when it isn't dependent on last CPSR defining instruction. rdar://8928208 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129773 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid write-after-write issue hazards for Cortex-A9.Bob Wilson2011-04-193-10/+49
| | | | | | | | | | | Add a avoidWriteAfterWrite() target hook to identify register classes that suffer from write-after-write hazards. For those register classes, try to avoid writing the same register in two consecutive instructions. This is currently disabled by default. We should not spill to avoid hazards! The command line flag -avoid-waw-hazard can be used to enable waw avoidance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129772 91177308-0d34-0410-b5e6-96231b3b80d8
* Some single-precision VFP instructions can execute in either the VPF or NeonBob Wilson2011-04-191-0/+24
| | | | | | pipelines, at least on Cortex-A9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129771 91177308-0d34-0410-b5e6-96231b3b80d8
* Improvements for the Cortex-A9 scheduling itineraries.Bob Wilson2011-04-191-12/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129770 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for FastISel'ing varargs calls.Eli Friedman2011-04-191-4/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129765 91177308-0d34-0410-b5e6-96231b3b80d8
* Force the greedy register allocator to be linked alongside linear scan.Jakob Stoklund Olesen2011-04-191-0/+5
| | | | | | This means that the new register allocator can be used with 'clang -mllvm -regalloc=greedy'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129764 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectBasicBlock is rather slow even when it doesn't do anything; skip theEli Friedman2011-04-191-5/+7
| | | | | | | | unnecessary work where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129763 91177308-0d34-0410-b5e6-96231b3b80d8
* Support nested CALLSEQ_BEGIN/END; necessary for ARM byval support. ↵Stuart Hastings2011-04-191-42/+56
| | | | | | <rdar://problem/7662569> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129761 91177308-0d34-0410-b5e6-96231b3b80d8
* Trivial simplification.Jay Foad2011-04-191-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129759 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for x86 fastisel of small fixed-sized memcpys, which are ↵Chris Lattner2011-04-192-57/+94
| | | | | | | | | | generated en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x and shrinks the generated .s file by 5% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129755 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy upChris Lattner2011-04-191-3/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129753 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for fast isel of calls of i1 arguments, even though they ↵Chris Lattner2011-04-191-10/+23
| | | | | | | | | | | | | are illegal, when they are a truncate from something else. This eliminates fully half of all the fastisel rejections on a test c++ file I'm working with, which should make a substantial improvement for -O0 compile of c++ code. This fixed rdar://9297003 - fast isel bails out on all functions taking bools git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129752 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle i1/i8/i16 constant integer arguments to calls by prepromoting them.Chris Lattner2011-04-191-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before we would bail out on i1 arguments all together, now we just bail on non-constant ones. Also, we used to emit extraneous code. e.g. test12 was: movb $0, %al movzbl %al, %edi callq _test12 and test13 was: movb $0, %al xorl %edi, %edi movb %al, 7(%rsp) callq _test13f Now we get: movl $0, %edi callq _test12 and: movl $0, %edi callq _test13f git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129751 91177308-0d34-0410-b5e6-96231b3b80d8
* be layout aware, to produce:Chris Lattner2011-04-191-1/+8
| | | | | | | | | | | | | | | | | | | | testb $1, %al je LBB0_2 ## BB#1: ## %if.then movb $0, %al instead of: testb $1, %al jne LBB0_1 jmp LBB0_2 LBB0_1: ## %if.then movb $0, %al how 'bout that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129749 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://9297006 - fast isel bails out on trunc to i1 -> bools cry,Chris Lattner2011-04-191-6/+29
| | | | | | | a common cause of fast isel rejects on c++ code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129748 91177308-0d34-0410-b5e6-96231b3b80d8
* Change A9 scheduling itineraries VLD* / VST* entries default to "aligned". ThatEvan Cheng2011-04-192-172/+373
| | | | | | | | | | is, it assumes addresses are 64-bit aligned (which should be the more common case). If the alignment is found not to be aligned, then getOperandLatency() would adjust the operand latency computation by one to compensate for it. rdar://9294833 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129742 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not lose mem_operands while lowering VLD / VST intrinsics.Evan Cheng2011-04-192-4/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129738 91177308-0d34-0410-b5e6-96231b3b80d8
* Use ArrayRef variants.Devang Patel2011-04-181-35/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129735 91177308-0d34-0410-b5e6-96231b3b80d8
* Add BumpPtrAllocator::getTotalMemory() to allow clients to query how much ↵Ted Kremenek2011-04-181-0/+8
| | | | | | memory a BumpPtrAllocator allocated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129727 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim a few unneeded includes.Jim Grosbach2011-04-183-31/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129723 91177308-0d34-0410-b5e6-96231b3b80d8
* Invert the meaning of printAliasInstr's return value. It now returnsEric Christopher2011-04-182-1/+4
| | | | | | | true on success and false on failure. Update callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129722 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify declarations slightly by using typedefs.Eli Friedman2011-04-181-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129720 91177308-0d34-0410-b5e6-96231b3b80d8
* malloc elimination: it's a bad idea to use raw_svector_ostream on aEli Friedman2011-04-181-1/+4
| | | | | | | | | | small heap-allocated SmallString because it unconditionally forces a malloc. (Revised version of r129688, with the necessary flush() call.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129716 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce clutter in asm output. Do not emit source location as comment for ↵Devang Patel2011-04-187-38/+20
| | | | | | each instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129715 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle spilling around an instruction that has an early-clobber re-definition ofJakob Stoklund Olesen2011-04-181-14/+15
| | | | | | | | the spilled register. This is quite common on ARM now that some stores have early-clobber defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129714 91177308-0d34-0410-b5e6-96231b3b80d8
* Small fix to the ARM AsmParser to ensure that aSean Callanan2011-04-181-0/+1
| | | | | | | superclass variable is instantiated properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129713 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug where we were counting the alias sets as completely usedEric Christopher2011-04-181-5/+0
| | | | | | | | | | | registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129711 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark some functions as used which are used within debug-only code. ThisChandler Carruth2011-04-182-0/+5
| | | | | | silences Clang's -Wunused-function when building in release mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129709 91177308-0d34-0410-b5e6-96231b3b80d8
* while we're at it, handle 'sdiv exact' of a power of 2 also,Chris Lattner2011-04-181-0/+8
| | | | | | | this fixes a few rejects on c++ iterator loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129694 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://9297011 - udiv by power of two causing fast-isel rejectsChris Lattner2011-04-181-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129693 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new bit that ImmLeaf's can opt into, which allows them to duck out ofChris Lattner2011-04-181-3/+6
| | | | | | | | | the generated FastISel. X86 doesn't need to generate code to match ADD16ri8 since ADD16ri will do just fine. This is a small codesize win in the generated instruction selector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129692 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r129688; it's breaking buildbots.Eli Friedman2011-04-181-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129689 91177308-0d34-0410-b5e6-96231b3b80d8
* More malloc elimination: it's a bad idea to use raw_svector_ostream on aEli Friedman2011-04-181-1/+3
| | | | | | | | small heap-allocated SmallString because it unconditionally forces a malloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129688 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the StringMaps attached to MCContext use the MCContext's allocator; Eli Friedman2011-04-181-1/+3
| | | | | | | | reduces the number of calls to malloc(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129687 91177308-0d34-0410-b5e6-96231b3b80d8
* switch the rest of the x86 immediate patterns over to ImmLeaf, Chris Lattner2011-04-171-17/+9
| | | | | | | | simplifying them and exposing more information to tblgen. It would be nice if other target authors adopted this as well, particularly arm since it has fastisel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129676 91177308-0d34-0410-b5e6-96231b3b80d8
* now that predicates have a decent abstraction layer on them, introduce a new Chris Lattner2011-04-171-1/+6
| | | | | | | | | | kind of predicate: one that is specific to imm nodes. The predicate function specified here just checks an int64_t directly instead of messing around with SDNode's. The virtue of this is that it means that fastisel and other things can reason about these predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129675 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework our internal representation of node predicates to expose moreChris Lattner2011-04-171-1/+1
| | | | | | | | | structure and fix some fixmes. We now have a TreePredicateFn class that handles all of the decoding of these things. This is an internal cleanup that has no impact on the code generated by tblgen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129670 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.llChris Lattner2011-04-172-40/+43
| | | | | | | | | | | | 2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129666 91177308-0d34-0410-b5e6-96231b3b80d8
* fix an x86 fast isel issue where we'd completely give up on folding an addressChris Lattner2011-04-171-71/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when we have a global variable base an an index. Instead, just give up on folding the global variable. Before we'd geenrate: _test: ## @test ## BB#0: movq _rtx_length@GOTPCREL(%rip), %rax leaq (%rax), %rax addq %rdi, %rax movzbl (%rax), %eax ret now we generate: _test: ## @test ## BB#0: movq _rtx_length@GOTPCREL(%rip), %rax movzbl (%rax,%rdi), %eax ret The difference is even more significant when there is a scale involved. This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129664 91177308-0d34-0410-b5e6-96231b3b80d8
* fix an oversight which caused us to compile the testcase (and otherChris Lattner2011-04-172-9/+10
| | | | | | | | | | | | | | | | | | | | | less trivial things) into a dummy lea. Before we generated: _test: ## @test movq _G@GOTPCREL(%rip), %rax leaq (%rax), %rax ret now we produce: _test: ## @test movq _G@GOTPCREL(%rip), %rax ret This is part of rdar://9289558 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129662 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up and reduce indentation.Chris Lattner2011-04-171-37/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129661 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix rdar://9289512 - not folding load into compare at -O0Chris Lattner2011-04-171-15/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The basic issue here is that bottom-up isel is matching the branch and compare, and was failing to fold the load into the branch/compare combo. Fixing this (by allowing folding into any instruction of a sequence that is selected) allows us to produce things like: cmpb $0, 52(%rax) je LBB4_2 instead of: movb 52(%rax), %cl cmpb $0, %cl je LBB4_2 This makes the generated -O0 code run a bit faster, but also speeds up compile time by putting less pressure on the register allocator and generating less code. This was one of the biggest classes of missing load folding. Implementing this shrinks 176.gcc's c-decl.s (as a random example) by about 4% in (verbose-asm) line count. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129656 91177308-0d34-0410-b5e6-96231b3b80d8
* split a complex predicate out to a helper function. Simplify two for loops,Chris Lattner2011-04-171-10/+16
| | | | | | | | which don't need to check for falling off the end of a block *and* end of phi nodes, since terminators are never phis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129655 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove working entry from README.Eli Friedman2011-04-171-8/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129654 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://9289583 - fast isel should handle non-canonical commutative binopsChris Lattner2011-04-171-4/+23
| | | | | | | | | | | | allowing us to fold the immediate into the 'and' in this case: int test1(int i) { return 8&i; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129653 91177308-0d34-0410-b5e6-96231b3b80d8
* PR9055: extend the fix to PR4050 (r70179) to apply to zext and anyext.Eli Friedman2011-04-161-2/+2
| | | | | | | | | Returning a new node makes the code try to replace the old node, which in the included testcase is killed by CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129650 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename a misleadingly-named variable.Frits van Bommel2011-04-161-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129644 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the MSVC 2010 build.Francois Pichet2011-04-161-1/+2
| | | | | | For further information on this particular issue see: http://connect.microsoft.com/VisualStudio/feedback/details/520043/error-converting-from-null-to-a-pointer-type-in-std-pair git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129642 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug when checking phi operands in InstCombiner::visitPHINode(),Jay Foad2011-04-161-1/+1
| | | | | | found by code inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129641 91177308-0d34-0410-b5e6-96231b3b80d8
* MSVC needs the return 0 to compile.Francois Pichet2011-04-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129640 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2025-08-04 11:08:04 +0000