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* When merging Thumb2 loads/stores, do not give up when the offset is one ofBob Wilson2010-08-271-10/+7
| | | | | | | | | the special values that for ARM would be used with IB or DA modes. Fall through and consider materializing a new base address is it would be profitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112329 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a prototype of a new peephole optimizing pass that uses LazyValue info ↵Owen Anderson2010-08-271-0/+113
| | | | | | | | | to simplify PHIs and select's. This pass addresses the missed optimizations from PR2581 and PR4420. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112325 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve the precision of getConstant().Owen Anderson2010-08-271-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112323 91177308-0d34-0410-b5e6-96231b3b80d8
* Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson2010-08-2710-166/+91
| | | | | | | | | | | | | | | | | | | | all the other LDM/STM instructions. This fixes asm printer crashes when compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run with -O0 to check this in the future. Prior to this change VLDM/VSTM used addressing mode #5, but not really. The offset field was used to hold a count of the number of registers being loaded or stored, and the AM5 opcode field was expanded to specify the IA or DB mode, instead of the standard ADD/SUB specifier. Much of the backend was not aware of these special cases. The crashes occured when rewriting a frameindex caused the AM5 offset field to be changed so that it did not have a valid submode. I don't know exactly what changed to expose this now. Maybe we've never done much with -O0 and NEON. Regardless, there's no longer any reason to keep a count of the VLDM/VSTM registers, so we can use addressing mode #4 and clean things up in a lot of places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
* Enhance the shift propagator to handle the case when you have:Chris Lattner2010-08-271-22/+56
| | | | | | | | | | | | | | | | | | A = shl x, 42 ... B = lshr ..., 38 which can be transformed into: A = shl x, 4 ... iff we can prove that the would-be-shifted-in bits are already zero. This eliminates two shifts in the testcase and allows eliminate of the whole i128 chain in the real example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112314 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify.Devang Patel2010-08-271-4/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112305 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a pretty general logical shift propagationChris Lattner2010-08-272-2/+227
| | | | | | | | | | | | | framework, which is good at ripping through bitfield operations. This generalize a bunch of the existing xforms that instcombine does, such as (x << c) >> c -> and to handle intermediate logical nodes. This is useful for ripping up the "promote to large integer" code produced by SRoA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112304 91177308-0d34-0410-b5e6-96231b3b80d8
* Unsigned value cannot be < 0.Bob Wilson2010-08-271-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112300 91177308-0d34-0410-b5e6-96231b3b80d8
* When merging adjacent operands, scan ahead and merge all equalDan Gohman2010-08-271-11/+14
| | | | | | | adjacent operands at once, instead of just two at a time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112299 91177308-0d34-0410-b5e6-96231b3b80d8
* remove some special shift cases that have been subsumed into theChris Lattner2010-08-271-34/+13
| | | | | | | more general simplify demanded bits logic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112291 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the {A,+,B}<L> + {C,+,D}<L> --> Other + {A+C,+,B+D}<L>Dan Gohman2010-08-271-23/+21
| | | | | | | | | transformation collect all the addrecs with the same loop add combine them at once rather than starting everything over at the first chance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112290 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove now unneeded command line flag that enables 'optimize compares.'Bill Wendling2010-08-271-8/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112287 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typos in comments.Owen Anderson2010-08-271-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112286 91177308-0d34-0410-b5e6-96231b3b80d8
* teach the truncation optimization that an entire chain ofChris Lattner2010-08-271-0/+5
| | | | | | | | computation can be truncated if it is fed by a sext/zext that doesn't have to be exactly equal to the truncation result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112285 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch ScalarEvolution's main Value*->SCEV* map from std::mapDan Gohman2010-08-271-28/+26
| | | | | | | to DenseMap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112281 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an instcombine to clean up a common pattern producedChris Lattner2010-08-271-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112278 91177308-0d34-0410-b5e6-96231b3b80d8
* Add alignment arguments to all the NEON load/store intrinsics.Bob Wilson2010-08-271-1/+66
| | | | | | | | Update all the tests using those intrinsics and add support for auto-upgrading bitcode files with the old versions of the intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112271 91177308-0d34-0410-b5e6-96231b3b80d8
* Use LVI to eliminate conditional branches where we've tested a related ↵Owen Anderson2010-08-272-1/+41
| | | | | | | | | condition previously. Update tests for this change. This fixes PR5652. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112270 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize SCEVComplexityCompare. Use a 3-way return instead of a 2-wayDan Gohman2010-08-271-48/+82
| | | | | | | | return to avoid needing two calls to test for equivalence, and sort addrecs by their degree before examining their operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112267 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly handle passing of FP stuff to varargs function on Win64:Anton Korobeynikov2010-08-272-0/+42
| | | | | | | value should be copied to the corresponding shadow reg as well. Patch by Cameron Esfahani! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112262 91177308-0d34-0410-b5e6-96231b3b80d8
* MCELF: Port EmitInstruction changes from MachO streamer. Patch by Roman Divacky.Benjamin Kramer2010-08-271-41/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112260 91177308-0d34-0410-b5e6-96231b3b80d8
* MCELF: Always overwrite FixedValue.Benjamin Kramer2010-08-271-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112259 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard ↵Daniel Dunbar2010-08-271-1/+1
| | | | | | to find miscompiles with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112250 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r112213. It is not needed.Devang Patel2010-08-262-19/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112242 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-2631-147/+74
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112241 91177308-0d34-0410-b5e6-96231b3b80d8
* If node is not available then use FuncInfo.ValueMap to emit debug info for ↵Devang Patel2010-08-261-5/+9
| | | | | | byval parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112238 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the now obsolete frame index virtual re-use algorithm from PEI. Pre-RAJim Grosbach2010-08-261-148/+9
| | | | | | | | | virtual base registers handle this function, and more. A bit more cleanup to do on the interface to eliminateFrameIndex() after this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112237 91177308-0d34-0410-b5e6-96231b3b80d8
* optimize "integer extraction out of the middle of a vector" as producedChris Lattner2010-08-261-13/+35
| | | | | | | | | by SRoA. This is part of rdar://7892780, but needs another xform to expose this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112232 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up a bit. no functional change.Jim Grosbach2010-08-262-31/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112228 91177308-0d34-0410-b5e6-96231b3b80d8
* optimize bitcast(trunc(bitcast(x))) where the result is a float and 'x'Chris Lattner2010-08-261-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | is a vector to be a vector element extraction. This allows clang to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax movd %eax, %xmm0 shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movd %xmm1, %rax movd %eax, %xmm1 addss %xmm2, %xmm1 shrq $32, %rax movd %eax, %xmm0 addss %xmm1, %xmm0 ret ... eliminating half of the horribleness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112227 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn off the scavenging based frame reg reuse briefly to measure whether it'sJim Grosbach2010-08-261-1/+1
| | | | | | | | still having a significant effect. It shouldn't be now that the pre-RA virtual base reg stuff is in. Assuming that's valididated by the nightly testers, we can simplify a lot of the PEI frame index code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112220 91177308-0d34-0410-b5e6-96231b3b80d8
* zap the now unused MVT::getIntVectorWithNumElementsBruno Cardoso Lopes2010-08-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112218 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively revert r112207.Devang Patel2010-08-261-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112216 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 col.Devang Patel2010-08-261-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112215 91177308-0d34-0410-b5e6-96231b3b80d8
* Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.Devang Patel2010-08-262-8/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112213 91177308-0d34-0410-b5e6-96231b3b80d8
* Use pseudo instructions for VST3.Bob Wilson2010-08-264-59/+81
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112208 91177308-0d34-0410-b5e6-96231b3b80d8
* Donot forget to resolve dangling debug info in a case where virtual ↵Devang Patel2010-08-261-1/+3
| | | | | | register, used for a value, is initialized after a dbg intrinsic is seen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112207 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r112176 without removing the other CMN patterns (that was ↵Bill Wendling2010-08-261-2/+46
| | | | | | unintentional). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112206 91177308-0d34-0410-b5e6-96231b3b80d8
* MCELF: Fix a thinko of mine.Benjamin Kramer2010-08-261-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112203 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment typos.Bob Wilson2010-08-263-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112202 91177308-0d34-0410-b5e6-96231b3b80d8
* Make JumpThreading smart enough to properly thread StrSwitch when it's ↵Owen Anderson2010-08-261-17/+77
| | | | | | compiled with clang++. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112198 91177308-0d34-0410-b5e6-96231b3b80d8
* MCELF: Compensate for the addend on i386. Patch by Roman Divacky, with some ↵Benjamin Kramer2010-08-261-14/+7
| | | | | | cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112197 91177308-0d34-0410-b5e6-96231b3b80d8
* Restrict the register to tGPR to make sure the str instruction will beJim Grosbach2010-08-261-4/+4
| | | | | | encodable as a 16-bit wide instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112195 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll.Dan Gohman2010-08-261-50/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112191 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r112091 and r111922, support for metadata linking, with aDan Gohman2010-08-268-58/+112
| | | | | | | | | | | | | | | fix: add a flag to MapValue and friends which indicates whether any module-level mappings are being made. In the common case of inlining, no module-level mappings are needed, so MapValue doesn't need to examine non-function-local metadata, which can be very expensive in the case of a large module with really deep metadata (e.g. a large C++ program compiled with -g). This flag is a little awkward; perhaps eventually it can be moved into the ClonedCodeInfo class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112190 91177308-0d34-0410-b5e6-96231b3b80d8
* StringRef::compare_numeric also differed from StringRef::compare for ↵Benjamin Kramer2010-08-261-1/+1
| | | | | | characters > 127. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112189 91177308-0d34-0410-b5e6-96231b3b80d8
* Do unsigned char comparisons in StringRef::compare_lower to be more ↵Benjamin Kramer2010-08-261-4/+4
| | | | | | consistent with compare in corner cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112185 91177308-0d34-0410-b5e6-96231b3b80d8
* There seems to be a (potential) hardware bug with the CMN instruction andBill Wendling2010-08-261-8/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | comparison with 0. These two pieces of code should give identical results: rsbs r1, r1, 0 cmp r0, r1 mov r0, #0 it ls mov r0, #1 and: cmn r0, r1 mov r0, #0 it ls mov r0, #1 However, the CMN gives the *opposite* result when r1 is 0. This is because the carry flag is set in the CMP case but not in the CMN case. In short, the CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the value of r0 and the carry bit (because the "carry bit" parameter to AddWithCarry is defined as 1 in this case, the carry flag will always be set when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is never a "carry" when this AddWithCarry is performed (because the "carry bit" parameter to AddWithCarry is defined as 0). The AddWithCarry in the CMP case seems to be relying upon the identity: ~x + 1 = -x However when x is 0 and unsigned, this doesn't hold: x = 0 ~x = 0xFFFF FFFF ~x + 1 = 0x1 0000 0000 (-x = 0) != (0x1 0000 0000 = ~x + 1) Therefore, we should disable *all* versions of CMN, especially when comparing against zero, until we can limit when the CMN instruction is used (when we know that the RHS is not 0) or when we have a hardware fix for this. (See the ARM docs for the "AddWithCarry" pseudo-code.) This is related to <rdar://problem/7569620>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112176 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a hackaround for PR7993 which is causing failures on x86 builders that ↵Chris Lattner2010-08-261-0/+2
| | | | | | lack sse2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
* implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.Chris Lattner2010-08-263-68/+94
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8