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* Teach LiveIntervals how to verify themselves and start using it in someChandler Carruth2012-07-101-0/+33
| | | | | | | | | | of the trick merge routines. This adds a layer of testing that was necessary when implementing more efficient (and complex) merge logic for this datastructure. No functionality changed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159981 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Allow more flexible patterns in NEON formats.Jim Grosbach2012-07-101-53/+53
| | | | | | | | | Some NEON instructions want to match against normal SDNodes for some operand types and Intrinsics for others. For example, CTLZ. To enable this, switch from explicitly requiring Intrinsic on the class templates to using SDPatternOperator instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159974 91177308-0d34-0410-b5e6-96231b3b80d8
* Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka2012-07-109-37/+88
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159971 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete code for folding undefs in ScalarEvolution. It's invalid inDan Gohman2012-07-091-14/+0
| | | | | | | obscure ways, and it isn't actually important in the real world. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159969 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r159938 (and r159945) to appease the buildbots.Chad Rosier2012-07-092-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159960 91177308-0d34-0410-b5e6-96231b3b80d8
* indentationAndrew Trick2012-07-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159958 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional ↵Owen Anderson2012-07-091-0/+36
| | | | | | | | | move, since there are only two possible values. Previously, this would become an integer extension operation, followed by a real integer->float conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159957 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: implement functions to analyze & synthesize CMOV|SET|JccManman Ren2012-07-091-138/+185
| | | | | | | | | | | | getCondFromSETOpc, getCondFromCMovOpc, getSETFromCond, getCMovFromCond No functional change intended. If we want to update the condition code of CMOV|SET|Jcc, we first analyze the opcode to get the condition code, then update the condition code, finally synthesize the new opcode form the new condition code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159955 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r158846.Akira Hatanaka2012-07-091-114/+77
| | | | | | | | Access mips register classes via MCRegisterInfo's functions instead of via the TargetRegisterClasses defined in MipsGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159953 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: merge the functions that remove dead allocas and dead ↵Nuno Lopes2012-07-094-122/+73
| | | | | | | | | mallocs/callocs/... This patch removes ~70 lines in InstCombineLoadStoreAlloca.cpp and makes both functions a bit more aggressive than before :) In theory, we can be more aggressive when removing an alloca than a malloc, because an alloca pointer should never escape, but we are not taking advantage of this anyway git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159952 91177308-0d34-0410-b5e6-96231b3b80d8
* Some formatting to keep Clang happyRichard Barton2012-07-091-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159948 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops - correct broken disassembly for VMOVRichard Barton2012-07-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159945 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix instruction description of VMOV (between two ARM core registers and two ↵Richard Barton2012-07-092-8/+8
| | | | | | single-precision resiters) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159938 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent ARM assembler from losing a right shift by #32 applied to a registerRichard Barton2012-07-091-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159937 91177308-0d34-0410-b5e6-96231b3b80d8
* Spelling!Richard Barton2012-07-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the assembler to use the narrow thumb encodings of various ↵Richard Barton2012-07-091-0/+80
| | | | | | three-register dp instructions where permissable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159935 91177308-0d34-0410-b5e6-96231b3b80d8
* I'm introducing a new machine model to simultaneously allow simpleAndrew Trick2012-07-0714-59/+104
| | | | | | | | | | | | | | | | | | | | | | | subtarget CPU descriptions and support new features of MachineScheduler. MachineModel has three categories of data: 1) Basic properties for coarse grained instruction cost model. 2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD). 3) Instruction itineraties for detailed per-cycle reservation tables. These will all live side-by-side. Any subtarget can use any combination of them. Instruction itineraries will not change in the near term. In the long run, I expect them to only be relevant for in-order VLIW machines that have complex contraints and require a precise scheduling/bundling model. Once itineraries are only actively used by VLIW-ish targets, they could be replaced by something more appropriate for those targets. This tablegen backend rewrite sets things up for introducing MachineModel type #2: per opcode/operand cost model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak spelling.Andrew Trick2012-07-071-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159889 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-071-5/+25
| | | | | | | | | It is safe if EFLAGS is killed or re-defined. When we are done with the basic block, check whether EFLAGS is live-out. Do not optimize away cmp if EFLAGS is live-out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159888 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the DebugInfo wrappers instead of mucking about with the MDNode directly.Bill Wendling2012-07-071-22/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159881 91177308-0d34-0410-b5e6-96231b3b80d8
* Print the name last.Bill Wendling2012-07-061-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159879 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the naming of ensureAlignment. Per the coding standard function namesChad Rosier2012-07-061-3/+3
| | | | | | should be camel case, and start with a lower case letter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159877 91177308-0d34-0410-b5e6-96231b3b80d8
* teach instcombine to remove allocated buffers even if there are stores, ↵Nuno Lopes2012-07-061-2/+25
| | | | | | | | | | | | memcpy/memmove/memset, and objectsize users. This means we can do cheap DSE for heap memory. Nothing is done if the pointer excapes or has a load. The churn in the tests is mostly due to objectsize, since we want to make sure we don't delete the malloc call before evaluating the objectsize (otherwise it becomes -1/0) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159876 91177308-0d34-0410-b5e6-96231b3b80d8
* Check if it's a scope last, because several things are scopes.Bill Wendling2012-07-061-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159873 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Add test cleanup entry to the README.Jim Grosbach2012-07-061-0/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159864 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r159851.Akira Hatanaka2012-07-062-131/+166
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159854 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r158846.Akira Hatanaka2012-07-062-166/+131
| | | | | | | Include file MipsGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159851 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a print method to the ObjC property object.Bill Wendling2012-07-061-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159848 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing comma in array initialization list.Bill Wendling2012-07-061-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159843 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary 'llvm::'.Bill Wendling2012-07-061-19/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159842 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary 'llvm::'.Bill Wendling2012-07-061-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159841 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace.Chad Rosier2012-07-061-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159839 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: peephole optimization to remove cmp instructionManman Ren2012-07-063-0/+302
| | | | | | | | | | For each Cmp, we check whether there is an earlier Sub which make Cmp redundant. We handle the case where SUB operates on the same source operands as Cmp, including the case where the two source operands are swapped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159838 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic.Chad Rosier2012-07-061-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159837 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r159804, "[arm-fast-isel] Add support for vararg function calls."NAKAMURA Takumi2012-07-061-33/+26
| | | | | | It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159817 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR13202 and a regtest.Alexey Samsonov2012-07-061-0/+6
| | | | | | | | | | | | | | DwarfDebug class could generate the same (inlined) DIVariable twice: 1) when trying to find abstract debug variable for a concrete inlined instance. 2) when explicitly collecting info for variables that were optimized out. This change makes sure that this duplication won't happen and makes Clang pass "gdb.opt/inline-locals" test from gdb testsuite. Reviewed by Eric Christopher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159811 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm-fast-isel] Add support for vararg function calls.Jush Lu2012-07-061-26/+33
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159804 91177308-0d34-0410-b5e6-96231b3b80d8
* Changes per review of commit 159787Jack Carter2012-07-061-6/+5
| | | | | | | | | | | Mips specific inline asm operand modifier D. Comment changes and predicate change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159802 91177308-0d34-0410-b5e6-96231b3b80d8
* Untabify and move a function near similar functions dealing with structEric Christopher2012-07-061-29/+30
| | | | | | types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159801 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some comments suggested in code review.Jakob Stoklund Olesen2012-07-061-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159800 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips specific inline asm operand modifier D.Jack Carter2012-07-051-7/+41
| | | | | | | | | | | | | Print the second half of a double word operand. The include list was cleaned up a bit as well. Also the test case was modified to test for both big and little patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159787 91177308-0d34-0410-b5e6-96231b3b80d8
* Enclose instruction rdhwr with directives, which are needed when target isAkira Hatanaka2012-07-051-0/+18
| | | | | | | | mips32 rev1 (the directives are emitted when target is mips32r2 too). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159770 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable target dependent directive parsing to hook before standard parser inAkira Hatanaka2012-07-051-3/+5
| | | | | | | | | | AsmParser::ParseStatement. Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159768 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize extendIntervalEndTo a tiny bit by saving one call through theChandler Carruth2012-07-051-7/+7
| | | | | | vector erase. No functionality changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159746 91177308-0d34-0410-b5e6-96231b3b80d8
* Finish fixing the MachineOperand hashing, providing a nice modernChandler Carruth2012-07-051-47/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | hash_value overload for MachineOperands. This addresses a FIXME sufficient for me to remove it, and cleans up the code nicely too. The important changes to the hashing logic: - TargetFlags are now included in all of the hashes. These were complete missed. - Register operands have their subregisters and whether they are a def included in the hash. - We now actually hash all of the operand types. Previously, many operand types were simply *dropped on the floor*. For example: - Floating point immediates - Large integer immediates (>64-bit) - External globals! - Register masks - Metadata operands - It removes the offset from the block-address hash; I'm a bit suspicious of this, but isIdenticalTo doesn't consider the offset for black addresses. Any patterns involving these entities could have triggered extreme slowdowns in MachineCSE or PHIElimination. Let me know if there are PRs you think might be closed now... I'm looking myself, but I may miss them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159743 91177308-0d34-0410-b5e6-96231b3b80d8
* All cases are covered, no need for a default. This deals with theDuncan Sands2012-07-051-1/+0
| | | | | | | corresponding clang warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159742 91177308-0d34-0410-b5e6-96231b3b80d8
* The hash function for MI expressions, used by MachineCSE, is reallyChandler Carruth2012-07-051-3/+8
| | | | | | | | | | | | | | | | | | | | | broken. This patch fixes the superficial problems which lead to the intractably slow compile times reported in PR13225. The specific issue is that we were failing to include the *offset* of a global variable in the hash code. Oops. This would in turn cause all MIs which were only distinguishable due to operating on different offsets of a global variable to produce identical hash functions. In some of the test cases attached to the PR I saw hash table activity where there were O(1000) probes-per-lookup *on average*. A very few entries were responsible for most of these probes. There is still quite a bit more to do here. The ad-hoc layering of data in MachineOperands makes them *extremely* brittle to hash correctly. We're missing quite a few other cases, the only ones I've fixed here are the specific MO types which were allowed through the assert() in getOffset(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159741 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1Duncan Sands2012-07-051-9/+17
| | | | | | | booleans. Patch by James Benton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159739 91177308-0d34-0410-b5e6-96231b3b80d8
* [tsan] fix compile-time falilure found while building Chromium with tsan ↵Kostya Serebryany2012-07-051-0/+5
| | | | | | (tsan issue #3). A unit test will follow separately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159736 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove ParentMap. You can just ask the domnode for its parent. No functionalityNick Lewycky2012-07-051-11/+8
| | | | | | | | | | | change. Move the "Not profitable, avoid CSE!" debug message next to where we fail the check for profitability and use a different message for avoiding CSE due to being in different register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159729 91177308-0d34-0410-b5e6-96231b3b80d8
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