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* Bug fix: cast (bool) has higher precedence than %... who knew!Vikram S. Adve2002-07-101-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2864 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix print of BB name in dump().Vikram S. Adve2002-07-101-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2861 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for marking each operand as a %hh, %hm, %lm or %lo.Vikram S. Adve2002-07-101-34/+38
| | | | | | | | Represent previous bools and these ones with flags in a single byte per operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2860 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed interface to insertCallerSavingCode().Vikram S. Adve2002-07-101-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2859 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop using pseudo-instructions (SETX, SETUW, SETSW)Vikram S. Adve2002-07-101-10/+28
| | | | | | | and generate actual machine instruction sequences directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2858 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support to print %hh, %hm, %lm, or %lo in an operand field.Vikram S. Adve2002-07-101-14/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2857 91177308-0d34-0410-b5e6-96231b3b80d8
* Major overhaul to stop using pseudo-instructions (SETX, SETUW, SETSW)Vikram S. Adve2002-07-101-110/+207
| | | | | | | | | | | | and generate actual machine instruction sequences directly. Also a couple of bug fixes in code for putting constants into registers: -- Do *not* sign-extend unsigned constant that is shorter than int reg size -- Fix handling of address constant (a GlobalValue) vs. constant that must be loaded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2856 91177308-0d34-0410-b5e6-96231b3b80d8
* More important fixes:Vikram S. Adve2002-07-101-40/+53
| | | | | | | | | | | -- FP argument to a function with no prototype going on stack was not being copied to the stack in colorCallArgs(). -- Put caller-saving code *before* argument copying code so that we don't trash a register before saving it! -- Two other minor fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2855 91177308-0d34-0410-b5e6-96231b3b80d8
* *** empty log message ***Chris Lattner2002-07-101-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2852 91177308-0d34-0410-b5e6-96231b3b80d8
* changed mem_fun to std::mem_funAnand Shukla2002-07-092-4/+4
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* Added std:: to mem_fun for 64-bit gccAnand Shukla2002-07-091-2/+2
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* Implementing shift left & shift right on pointersChris Lattner2002-07-091-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2844 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for printing constant global references toVikram S. Adve2002-07-091-4/+10
| | | | | | | assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2842 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix iteration and InsertPos bugs introduced when Chris changed over to ilist.Vikram S. Adve2002-07-081-21/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2840 91177308-0d34-0410-b5e6-96231b3b80d8
* Numerous changes in interface to class SparcRegInfo corresponding toVikram S. Adve2002-07-081-75/+78
| | | | | | | | | changes in class MachineRegInfo (see MachineRegInfo.h for details). Added {LD,ST}[X]FSR instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2839 91177308-0d34-0410-b5e6-96231b3b80d8
* class MachineCodeForBasicBlock is now an annotation on BasicBlock.Vikram S. Adve2002-07-081-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2838 91177308-0d34-0410-b5e6-96231b3b80d8
* BA no longer has the unused CC operand.Vikram S. Adve2002-07-081-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2837 91177308-0d34-0410-b5e6-96231b3b80d8
* Have to save a boolean (setCC) value whenever use is outside the currentVikram S. Adve2002-07-081-20/+16
| | | | | | | | | | | basic block. Mark setCCInstr used as dest. of conditional-move as both a def and a use. BA instruction no longer has the unused CC argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2836 91177308-0d34-0410-b5e6-96231b3b80d8
* BA has only one argument.Vikram S. Adve2002-07-081-8/+12
| | | | | | | | Added LDFSR, LDXFSR, STFSR and STXFSR. Fixed operands info for RDCCR, WRCCR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2835 91177308-0d34-0410-b5e6-96231b3b80d8
* Significant changes to correctly spill CC registers and to correctlyVikram S. Adve2002-07-081-214/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | handle conditional move instructions: -- cpMem<->Reg functions now support CC registers (int and FP) correctly. Also, cpMem<->Reg functions now return a vector of machine instructions. -- Scratch registers must be explicitly provided to cpMem<->Reg when needed, since CC regs need one to be copied to/from memory. -- CC regs are saved to a scratch register instead of stack. -- All regs used by a instruction are now recorded in MachineInstr::regsUsed, since regs used to save values *across* an instruction are not obvious either from the operands or from the LiveVar sets. -- An (explicit or implicit) operand may now be both a def and a use. This is needed for conditional move operations. So an operand may need spill code both before and after the instruction. Other changes: -- Added several get{Class,Type} functions. -- Added unified-to-local register number conversion. -- class MachineCodeForBasicBlock is now an annotation on BasicBlock. -- Suggest/Color methods may modify the MachineInstr (and always did), so don't make that argument const! -- Caller-saving code doesn't need its special purpose code for handling CC registers since cpMem<->Reg handle those correctly now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2834 91177308-0d34-0410-b5e6-96231b3b80d8
* Significant changes to correctly spill CC registers and to correctlyVikram S. Adve2002-07-082-478/+328
| | | | | | | | | | | | | | | | | | handle conditional move instructions: -- cpMem<->Reg functions now support CC registers (int and FP) correctly. -- Scratch registers must be explicitly provided to cpMem<->Reg when needed, since CC regs need one to be copied to/from memory. -- CC regs are saved to a scratch register instead of stack. -- All regs used by a instruction are now recorded in MachineInstr::regsUsed, since regs used to save values *across* an instruction are not obvious either from the operands or from the LiveVar sets. -- An (explicit or implicit) operand may now be both a def and a use. This is needed for conditional move operations. So an operand may need spill code both before and after the instruction. -- class MachineCodeForBasicBlock is now an annotation on BasicBlock. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2833 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineInstr* in vector are not const (and never really were)Vikram S. Adve2002-07-082-18/+20
| | | | | | | | because operands may be modified directly to set register. Also, class MachineCodeForBasicBlock is now an annotation on BasicBlock. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2832 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename static struct Initializer to avoid name conflict with BB.Vikram S. Adve2002-07-081-3/+3
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* Fix printing of BB in dump.Vikram S. Adve2002-07-081-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2830 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved class MachineCodeForBasicBlock to MachineCodeForBasicBlock.h.Vikram S. Adve2002-07-082-6/+8
| | | | | | | This class is now an annotation on BasicBlock. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2829 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineInstr::dump() now takes no arguments.Vikram S. Adve2002-07-082-2/+2
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* Implementation of class MachineCodeForBasicBlock.Vikram S. Adve2002-07-081-0/+28
| | | | | | | Moved here from MachineInstr.cpp to make it an annotation on BasicBlock. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2827 91177308-0d34-0410-b5e6-96231b3b80d8
* A single MachineInstr operand may now be both a def and a use,Vikram S. Adve2002-07-0810-204/+182
| | | | | | | | | | so additional dep. edges have to be added. This was needed to correctly handle conditional move instructions! MachineCodeForBasicBlock is now an annotation on BasicBlock. Renamed "earliestForNode" to "earliestReadyTimeForNode". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2826 91177308-0d34-0410-b5e6-96231b3b80d8
* A single MachineInstr operand may now be both a def and a use.Vikram S. Adve2002-07-084-18/+26
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* getUsableUniRegAtMI interface simplified slightly.Vikram S. Adve2002-07-082-12/+14
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* Moved class MachineCodeForBasicBlock to MachineCodeForBasicBlock.{cpp,h}.Vikram S. Adve2002-07-081-11/+25
| | | | | | | | | An (explicit or implicit) operand may now be both a def and a use. Also add a set of regs used by each instruction. dump() no longer takes an optional argument, which doesn't work in gdb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2821 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineInstr* in vector are not const (and never really were)Vikram S. Adve2002-07-082-2/+2
| | | | | | | because operands may be modified directly to set register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2820 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved MachineCodeForBB to be an annotation on BasicBlock.Vikram S. Adve2002-07-081-4/+1
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* changes BBsorting and orederingAnand Shukla2002-07-082-720/+90
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* small correctionsAnand Shukla2002-07-081-23/+22
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* changed function numberingAnand Shukla2002-07-081-102/+95
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* *** empty log message ***Chris Lattner2002-06-305-5/+1
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* Clean up anands patchChris Lattner2002-06-301-1/+0
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* Remove diff-cluttering tagsChris Lattner2002-06-302-2/+0
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* Remove tag that just clutters diffsChris Lattner2002-06-302-2/+0
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* Fix anands changesChris Lattner2002-06-302-12/+8
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* Convert tabs to spacesChris Lattner2002-06-301-4/+4
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* Fix anand's last checkinChris Lattner2002-06-306-47/+43
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* changes for 64bit gccAnand Shukla2002-06-254-7/+8
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* added include<iostream> for cerrAnand Shukla2002-06-251-0/+1
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* added include<iostream> for cerrAnand Shukla2002-06-252-0/+2
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* changes to make it compatible with 64bit gccAnand Shukla2002-06-252-17/+18
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* additions and bug fixesAnand Shukla2002-06-255-445/+1395
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* added include<iostream> for cerrAnand Shukla2002-06-251-0/+1
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* changes to make it compatible with 64bit gccAnand Shukla2002-06-257-14/+34
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