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* Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.Jakob Stoklund Olesen2010-10-062-7/+16
| | | | | | | | This function is intended to be used when inserting a machine instruction that trivially restricts the legal registers, like LEA requiring a GR32_NOSP argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip unused registers when verifying LiveIntervals.Jakob Stoklund Olesen2010-10-061-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115874 91177308-0d34-0410-b5e6-96231b3b80d8
* remove trailing whitespaceJim Grosbach2010-10-061-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115860 91177308-0d34-0410-b5e6-96231b3b80d8
* First in a sequence of ARM/MC/*ELF* specific work.Jason W Kim2010-10-062-39/+60
| | | | | | | | | | | Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute() Added ARMAsmPrinter::emitAttributes() (plural s). TODO: .cpu attribute needs to be refactored git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115859 91177308-0d34-0410-b5e6-96231b3b80d8
* Another case of 256 sections not being enough :-)Rafael Espindola2010-10-061-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115858 91177308-0d34-0410-b5e6-96231b3b80d8
* Appease the clang self-host buildbot by providing a correct instantiation.Owen Anderson2010-10-061-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115857 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.Jim Grosbach2010-10-063-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115853 91177308-0d34-0410-b5e6-96231b3b80d8
* Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).Jim Grosbach2010-10-064-21/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115845 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-neededJim Grosbach2010-10-062-40/+3
| | | | | | | | "lane" operand modifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115843 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually beJim Grosbach2010-10-062-7/+28
| | | | | | | | pseudo instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115840 91177308-0d34-0410-b5e6-96231b3b80d8
* Get binding and visibility info from the the alias, but Type from the symbolRafael Espindola2010-10-061-3/+25
| | | | | | being aliased. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115836 91177308-0d34-0410-b5e6-96231b3b80d8
* Hide analysis group registration behind a macro, just like pass registration.Owen Anderson2010-10-064-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115835 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for DW_TAG_unspecified_parameters.Devang Patel2010-10-062-7/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115833 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a 'pattern' arg to the ARM PseudoNeonI class.Jim Grosbach2010-10-062-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115831 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add missing forward in MCLoggingStreamer.Michael J. Spencer2010-10-061-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115830 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "RequiresUnique" patch. This should be handled at a lower level.Bill Wendling2010-10-061-37/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115827 91177308-0d34-0410-b5e6-96231b3b80d8
* If a symbol is global, reloc against it even if it is in a mergeable section.Rafael Espindola2010-10-061-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115817 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused variables.Nick Lewycky2010-10-061-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115802 91177308-0d34-0410-b5e6-96231b3b80d8
* target operand flag values aren't a bitmaskJim Grosbach2010-10-061-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115798 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure weak symbols are listed after the local ones.Rafael Espindola2010-10-062-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115795 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly handle GOTPCREL relocations.Rafael Espindola2010-10-061-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115793 91177308-0d34-0410-b5e6-96231b3b80d8
* ComputeLinearIndex doesn't need its TLI argument.Dan Gohman2010-10-062-9/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115792 91177308-0d34-0410-b5e6-96231b3b80d8
* Change RequiresMerge to RequiresUnique. It's a better description of what thisBill Wendling2010-10-061-7/+8
| | | | | | | | | fix is trying to accomplish. This code could still use some polishing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115759 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-0612-65/+335
| | | | | | | | | | | | | | allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
* If the destination module all ready has a copy of the global coming from theBill Wendling2010-10-061-7/+36
| | | | | | | | | | | | | | source module *and* it must be merged (instead of simply replaced or appended to), then merge instead of replacing or adding another global. The ObjC __image_info section was being appended to because of this failure. This caused a crash because the linker expects the image info section to be a specific size. <rdar://problem/8198537> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115753 91177308-0d34-0410-b5e6-96231b3b80d8
* enhance X86TypeInfo to include information about the encoding andChris Lattner2010-10-061-20/+36
| | | | | | | | | operand kind for immediates. Use these to define a new BinOpRI class and switch AND8/16/32ri over to it. AND64ri32 needs some more refactoring before it can make the switcheroo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115752 91177308-0d34-0410-b5e6-96231b3b80d8
* add a class for _REV nodes.Chris Lattner2010-10-061-19/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115748 91177308-0d34-0410-b5e6-96231b3b80d8
* sink more intelligence into the ITy base class. Now it knowsChris Lattner2010-10-061-12/+21
| | | | | | | | that i8 operations are even and i16,i32,i64 operations have a low opcode bit set (they are odd). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115747 91177308-0d34-0410-b5e6-96231b3b80d8
* refactor things a bit, now the REX_W and OpSize prefix bytes are inferred ↵Chris Lattner2010-10-061-22/+46
| | | | | | from the type info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115745 91177308-0d34-0410-b5e6-96231b3b80d8
* with tblgen suitably extended, we can now get the load node from typeinfo.Chris Lattner2010-10-061-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115744 91177308-0d34-0410-b5e6-96231b3b80d8
* lib/System/Win32/Signals.inc: Enable LLVM_DISABLE_CRT_DEBUG also on mingw.NAKAMURA Takumi2010-10-061-6/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115731 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide a fast "get me the target triple from the module" API. This canBill Wendling2010-10-062-1/+129
| | | | | | | | | drastically reduce the linking time during LTO. Patch by Shantonu Sen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115728 91177308-0d34-0410-b5e6-96231b3b80d8
* lets go all meta and define new X86 type wrappers that declare the associatedChris Lattner2010-10-062-42/+65
| | | | | | | | gunk that goes along with an MVT (e.g. reg class, preferred load operation, memory operand) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115727 91177308-0d34-0410-b5e6-96231b3b80d8
* introduce a new BinOpRM class and use it to factor AND*rm. This points outChris Lattner2010-10-061-21/+16
| | | | | | | that I need a heavier handed approach to get ultimate factorization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115726 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 placesChris Lattner2010-10-061-8/+8
| | | | | | | where !cast is just as short. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115722 91177308-0d34-0410-b5e6-96231b3b80d8
* replace stuff like:Chris Lattner2010-10-061-15/+11
| | | | | | | | | | | | | | | | let AsmString = !strconcat( !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)), !strconcat("\t", asm)); with: let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm); :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115720 91177308-0d34-0410-b5e6-96231b3b80d8
* allow !strconcat to take more than two operands to eliminateChris Lattner2010-10-053-16/+12
| | | | | | | | | !strconcat(!strconcat(!strconcat(!strconcat Simplify some x86 td files to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115719 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a relocation against the symbol if it is a PLT and the symbol is in anotherRafael Espindola2010-10-051-2/+11
| | | | | | section. Common because of linkonce sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115718 91177308-0d34-0410-b5e6-96231b3b80d8
* Comment out fastisel debugging message.Eric Christopher2010-10-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115717 91177308-0d34-0410-b5e6-96231b3b80d8
* associate the instruction suffix letter with the integer gpr Chris Lattner2010-10-052-18/+29
| | | | | | | | register class, and use this to simplify use of BinOpRR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115716 91177308-0d34-0410-b5e6-96231b3b80d8
* introduce a new BinOpRR class, and convert 4 and instructions to use it.Chris Lattner2010-10-051-19/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115715 91177308-0d34-0410-b5e6-96231b3b80d8
* Random cleanup and make the intermediate register in fptosi aEric Christopher2010-10-051-5/+5
| | | | | | | | | 32-bit fp reg, not 64-bit. Fixes SingleSource. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115711 91177308-0d34-0410-b5e6-96231b3b80d8
* Count uses in all nested loops, not just the deepest.Jakob Stoklund Olesen2010-10-051-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115710 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove SplitAnalysis::removeUse. It was only used to make SplitAnalysisJakob Stoklund Olesen2010-10-052-32/+0
| | | | | | | reusable, but that is no longer relevant since a split will always replace the original. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115709 91177308-0d34-0410-b5e6-96231b3b80d8
* dupli always has an interval now.Jakob Stoklund Olesen2010-10-051-14/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115708 91177308-0d34-0410-b5e6-96231b3b80d8
* Move cmov pseudo instructions to InstrCompiler,Chris Lattner2010-10-052-582/+77
| | | | | | | | | | | | | convert all the rest of the cmovs to the multiclass, with good results: X86InstrCMovSetCC.td | 598 +-------------------------------------------------- X86InstrCompiler.td | 61 +++++ 2 files changed, 77 insertions(+), 582 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115707 91177308-0d34-0410-b5e6-96231b3b80d8
* Use #NAME# to have the CMOV multiclass define things with the same names as ↵Chris Lattner2010-10-054-43/+46
| | | | | | | | | before (e.g. CMOVBE16rr instead of CMOVBErr16). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115705 91177308-0d34-0410-b5e6-96231b3b80d8
* Another step towards getting rid of static ctors for pass registration: have ↵Owen Anderson2010-10-051-1/+0
| | | | | | | | | | | INITIALIZE_PASS AND INITIALIZE_AG_PASS expand to an initializeMyPass() function (in additional to the extant static ctors). Eventually, these will be called from a big InitializeAllPasses() function, and the PassInfo's they create (which would be leaked if this code were used at the moment) will be handed off to a PassRegistry for ownership. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115703 91177308-0d34-0410-b5e6-96231b3b80d8
* enhance tblgen to support anonymous defm's, use this toChris Lattner2010-10-051-16/+16
| | | | | | | simplify the X86 CMOVmr's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115702 91177308-0d34-0410-b5e6-96231b3b80d8
* convert cmov mr patterns to use a multipattern. Death to redundancyChris Lattner2010-10-051-97/+25
| | | | | | | and verbosity git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
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