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* Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola2010-07-117-9/+16
| | | | | | | | | | | | | | | correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
* Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.Jakob Stoklund Olesen2010-07-111-30/+12
| | | | | | | This assumes that the registers can be copied which is probably a safe assumption. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
* Use COPY in FastISel everywhere it is safe and trivial.Jakob Stoklund Olesen2010-07-112-26/+12
| | | | | | | The remaining copyRegToReg calls actually check the return value (shock!), so we cannot trivially replace them with COPY instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen2010-07-112-56/+68
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace copyRegToReg with copyPhysReg for Alpha.Jakob Stoklund Olesen2010-07-112-28/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065 91177308-0d34-0410-b5e6-96231b3b80d8
* Use COPY in targetsJakob Stoklund Olesen2010-07-103-22/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.Jakob Stoklund Olesen2010-07-107-98/+62
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
* Only collect subreg extracting copies for later coalescing.Jakob Stoklund Olesen2010-07-101-1/+1
| | | | | | This also avoids fatal copies from physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;Dan Gohman2010-07-101-1/+3
| | | | | | | | | if a block is split (by a custom inserter), the insert point may be in a different block than it was originally. This fixes 32-bit llvm-gcc bootstrap builds, and I haven't been able to reproduce it otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060 91177308-0d34-0410-b5e6-96231b3b80d8
* The accumulator tail recursion transform claims to work for any associativeDuncan Sands2010-07-101-14/+14
| | | | | | | | | | | | | | | | | operation, but the way it's implemented requires the operation to also be commutative. So add a check for commutativity (and tweak the corresponding comments). This makes no difference in practice since every associative LLVM instruction is also commutative! Here's an example to show the need for commutativity: the accum_recursion.ll testcase calculates the factorial function. Before the transformation the result of a call is ((((1*1)*2)*3)...)*x while afterwards it is (((1*x)*(x-1))...*2)*1 which clearly requires both associativity and commutativity of * to be equal to the original. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit COPY instructions instead of using copyRegToReg in InstrEmitter,Jakob Stoklund Olesen2010-07-104-53/+21
| | | | | | | | | ScheduleDAGEmit, TwoAddressLowering, and PHIElimination. This switches the bulk of register copies to using COPY, but many less used copyRegToReg calls remain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.Jakob Stoklund Olesen2010-07-102-83/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch by Rafael Espíndola. Attempt to make the FpSET_ST1 hack more robust, but we are still relying on FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline asm. We support: FpSET_ST0 INLINEASM FpSET_ST0 FpSET_ST1 INLINEASM with and without kills on the arguments. We don't support: FpSET_ST1 FpSET_ST0 INLINEASM nor FpSET_ST1 INLINEASM Just Don't Do It! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047 91177308-0d34-0410-b5e6-96231b3b80d8
* Insert IMPLICIT_DEF instructions at the current insert position, notDan Gohman2010-07-101-1/+1
| | | | | | | at the end of the block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
* Add parentheses yet again to satisfy GCC's warnings.Chandler Carruth2010-07-101-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-1017-357/+684
| | | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
* An x86 function returns a floating point value in st(0), and we must make sureJakob Stoklund Olesen2010-07-101-18/+26
| | | | | | | | | it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent the required sideeffect, so insert an FpGET_ST0 instruction directly instead. This will matter when CopyFromReg gets lowered to a generic COPY instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037 91177308-0d34-0410-b5e6-96231b3b80d8
* Update DBG_VALUE to refer appropriate stack slot in case of a spill.Devang Patel2010-07-091-2/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023 91177308-0d34-0410-b5e6-96231b3b80d8
* Declare YMM subregisters in the right way! Thanks JakobBruno Cardoso Lopes2010-07-091-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX 256-bit packed MOVNT variantsBruno Cardoso Lopes2010-07-091-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
* Remember the *_TC opcodes for load/storeJakob Stoklund Olesen2010-07-091-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX 256-bit unpack and interleaveBruno Cardoso Lopes2010-07-091-0/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix small bug in isMoveInstr -> COPY translationJakob Stoklund Olesen2010-07-091-3/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013 91177308-0d34-0410-b5e6-96231b3b80d8
* Automatically fold COPY instructions into stack load/store.Jakob Stoklund Olesen2010-07-093-11/+77
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a few testsJakob Stoklund Olesen2010-07-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011 91177308-0d34-0410-b5e6-96231b3b80d8
* Remat uncoalescable COPY instrsJakob Stoklund Olesen2010-07-091-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010 91177308-0d34-0410-b5e6-96231b3b80d8
* In the presence of variable sized objects, allocate an emergency spill slot.Jim Grosbach2010-07-091-3/+10
| | | | | | rdar://8131327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify what mysterious check means.Bill Wendling2010-07-091-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MachineLICM to actually visit inner loops.Dan Gohman2010-07-091-3/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
* Start the support for AVX instructions with 256-bit %ymm registers. A couple ofBruno Cardoso Lopes2010-07-098-18/+99
| | | | | | | | | | | | | | | | | notes: - The instructions are being added with dummy placeholder patterns using some 256 specifiers, this is not meant to work now, but since there are some multiclasses generic enough to accept them, when we go for codegen, the stuff will be already there. - Add VEX encoding bits to support YMM - Add MOVUPS and MOVAPS in the first round - Use "Y" as suffix for those Instructions: MOVUPSYrr, ... - All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TII::foldMemoryOperand API to require the machine instruction to beJakob Stoklund Olesen2010-07-095-31/+32
| | | | | | | | | | | | | | inserted in a MBB, and return an already inserted MI. This target API change is necessary to allow foldMemoryOperand to call storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot reference in a target independent way. The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait until COPY folding is actually implemented. Most targets only fold copies and won't need to specialize this hook at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
* cache result of operator*Gabor Greif2010-07-091-6/+6
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* remove useless cast and fix typos in commentGabor Greif2010-07-091-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989 91177308-0d34-0410-b5e6-96231b3b80d8
* cache result of operator*Gabor Greif2010-07-091-3/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-0914-588/+333
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
* cache result of operator*Gabor Greif2010-07-091-3/+5
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* cache result of operator*Gabor Greif2010-07-091-2/+4
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* cache result of operator*Gabor Greif2010-07-091-2/+3
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* cache result of operator*Gabor Greif2010-07-091-2/+3
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* cache result of operator*Gabor Greif2010-07-091-4/+8
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* cache result of operator*Gabor Greif2010-07-091-2/+3
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* cache result of operator*Gabor Greif2010-07-091-11/+14
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* cache result of operator*Gabor Greif2010-07-091-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977 91177308-0d34-0410-b5e6-96231b3b80d8
* cache result of operator*Gabor Greif2010-07-092-7/+10
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* cache result of operator*Gabor Greif2010-07-091-4/+6
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* cache result of operator*Gabor Greif2010-07-091-2/+3
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* cache result of operator*Gabor Greif2010-07-091-2/+3
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* cache result of operator* (found by inspection)Gabor Greif2010-07-091-2/+4
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* cache result of operator*Gabor Greif2010-07-091-6/+7
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* cache result of operator*Gabor Greif2010-07-091-3/+4
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* cache result of operator*Gabor Greif2010-07-091-3/+4
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