aboutsummaryrefslogtreecommitdiffstats
path: root/lib
Commit message (Expand)AuthorAgeFilesLines
...
* Doubleword Shift Left Logical Plus 32Jack Carter2012-07-164-1/+57
* Target/AMDGPU: [CMake] Fix dependencies. 1) Add intrinsics_gen. Add AMDGPUCom...NAKAMURA Takumi2012-07-162-1/+3
* Target/AMDGPU/R600KernelParameters.cpp: Fix two includes, <llvm/IRBuilder.h> ...NAKAMURA Takumi2012-07-161-2/+2
* Build script changes for R600/SI Codegen v6Tom Stellard2012-07-161-1/+1
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-16114-0/+28329
* [asan] initialize asan error callbacks in runOnModule instead of doing that o...Kostya Serebryany2012-07-161-8/+20
* Fix a bug in the 3-address conversion of LEA when one of the operands is anNadav Rotem2012-07-161-0/+7
* Revert r160254 temporarily.Chandler Carruth2012-07-161-16/+16
* Teach AddressSanitizer to create basic blocks in a more natural order.Chandler Carruth2012-07-161-16/+16
* This CL changes the function prologue and epilogue emitted on X86 when stack ...Alexey Samsonov2012-07-161-53/+47
* Move llvm/Support/TypeBuilder.h -> llvm/TypeBuilder.h. This completesChandler Carruth2012-07-152-2/+2
* Move llvm/Support/MDBuilder.h to llvm/MDBuilder.h, to live withChandler Carruth2012-07-152-5/+5
* Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be ...Nadav Rotem2012-07-152-1/+10
* Teach getTargetVShiftNode about TargetConstant nodes.Nadav Rotem2012-07-151-1/+4
* Rename VBROADCASTSDrm into VBROADCASTSDYrm to match the naming convention.Nadav Rotem2012-07-152-3/+8
* Refactor the code that checks that all operands of a node are UNDEFs.Nadav Rotem2012-07-152-13/+28
* Reapply r160194, switching to use LV information for finding local kills.Chandler Carruth2012-07-151-56/+32
* AVX: Fix a bug in getTargetVShiftNode. The shift amount has to be a 128bit ve...Nadav Rotem2012-07-141-1/+7
* Add a dagcombine optimization to convert concat_vectors of undefs into a sing...Nadav Rotem2012-07-141-0/+11
* Account for early-clobber reload instructions.Jakob Stoklund Olesen2012-07-141-0/+4
* Be more verbose when detecting dominance problems.Jakob Stoklund Olesen2012-07-132-7/+29
* LSR Fix: check SCEV expression safety before expansion.Andrew Trick2012-07-132-1/+42
* IVUsers should only generate SCEV's for values that are safe to speculate.Andrew Trick2012-07-131-0/+7
* Factor SCEV traversal code so I can use it elsewhere. No functionality.Andrew Trick2012-07-131-51/+19
* This is one of the first steps at moving to replace target-dependent Joel Jones2012-07-132-1/+26
* Revert r160194, which switched to use LV information for finding localChandler Carruth2012-07-131-19/+54
* Use the LiveVariables information to efficiently get local kills. ThisChandler Carruth2012-07-131-54/+19
* Remove variable_ops from call instructions in most targets.Jakob Stoklund Olesen2012-07-1311-46/+44
* Remove variable_ops from ARM call instructions.Jakob Stoklund Olesen2012-07-133-22/+19
* The Mips specific relocation R_MIPS_GOT_DISP Jack Carter2012-07-134-4/+12
* Make helper functions static.Benjamin Kramer2012-07-132-2/+2
* Mark VINSERTI128rm as MayLoad=1. Fixes PR13348.Craig Topper2012-07-131-2/+2
* Fixed few warnings; trimmed empty lines.Galina Kistanova2012-07-131-123/+151
* Provide function name in 'Cannot select' fatal error.Jim Grosbach2012-07-131-0/+1
* The end of the prologue should be marked with is_stmt.Eric Christopher2012-07-121-1/+1
* Fixed few warnings.Galina Kistanova2012-07-123-7/+10
* Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...Benjamin Kramer2012-07-122-4/+5
* Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer2012-07-123-3/+49
* The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type ofDuncan Sands2012-07-121-0/+10
* Update GATHER instructions to support 2 read-write operands. Patch from mysel...Craig Topper2012-07-124-16/+44
* Instcombine was transforming:Evan Cheng2012-07-121-0/+7
* TableGen: Location information for diagnostic.Jim Grosbach2012-07-121-1/+1
* ARM: fix typo in commentsManman Ren2012-07-111-1/+1
* ARM: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-111-9/+14
* Patch for Mips direct object generation.Jack Carter2012-07-111-0/+8
* This change removes an "initialization" warning.Jack Carter2012-07-111-4/+3
* In MemoryBuffer::getOpenFile() don't verify that the mmap'edArgyrios Kyrtzidis2012-07-111-10/+0
* In register classes in MipsRegisterInfo.td, list the registers in ascendingAkira Hatanaka2012-07-111-99/+114
* [x86 fast-isel] Per discussion with Eric, add all cases to switch with verboseChad Rosier2012-07-111-1/+8
* X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair.Manman Ren2012-07-111-1/+22
generated by cgit v1.1 at 2025-03-20 01:26:57 +0000