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* Use the verbose asm flag instead of a new flag for decoding the LSDA.Bill Wendling2011-06-174-10/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133292 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an alternative rev16 pattern. We should figure out a better way to ↵Evan Cheng2011-06-172-0/+12
| | | | | | handle these complex rev patterns. rdar://9609108 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133289 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower multiply with overflow checking to __mulo<mode>Eric Christopher2011-06-173-4/+71
| | | | | | | | | | calls if we haven't been able to lower them any other way. Fixes rdar://9090077 and rdar://9210061 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option that allows one to "decode" the LSDA.Bill Wendling2011-06-174-6/+373
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LSDA is a bit difficult for the non-initiated to read. Even with comments, it's not always clear what's going on. This wraps the ASM streamer in a class that retains the LSDA and then emits a human-readable description of what's going on in it. So instead of having to make sense of: Lexception1: .byte 255 .byte 155 .byte 168 .space 1 .byte 3 .byte 26 Lset0 = Ltmp7-Leh_func_begin1 .long Lset0 Lset1 = Ltmp812-Ltmp7 .long Lset1 Lset2 = Ltmp913-Leh_func_begin1 .long Lset2 .byte 3 Lset3 = Ltmp812-Leh_func_begin1 .long Lset3 Lset4 = Leh_func_end1-Ltmp812 .long Lset4 .long 0 .byte 0 .byte 1 .byte 0 .byte 2 .byte 125 .long __ZTIi@GOTPCREL+4 .long __ZTIPKc@GOTPCREL+4 you can read this instead: ## Exception Handling Table: Lexception1 ## @LPStart Encoding: omit ## @TType Encoding: indirect pcrel sdata4 ## @TType Base: 40 bytes ## @CallSite Encoding: udata4 ## @Action Table Size: 26 bytes ## Action 1: ## A throw between Ltmp7 and Ltmp812 jumps to Ltmp913 on an exception. ## For type(s): __ZTIi@GOTPCREL+4 __ZTIPKc@GOTPCREL+4 ## Action 2: ## A throw between Ltmp812 and Leh_func_end1 does not have a landing pad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133286 91177308-0d34-0410-b5e6-96231b3b80d8
* Relocate NUW test to cover all binary ops in a dynamic alloca expr.Stuart Hastings2011-06-171-5/+4
| | | | | | | Followup to 132926. rdar://problem/9265821 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133285 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop the "2" suffix on some enums.Chris Lattner2011-06-172-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133274 91177308-0d34-0410-b5e6-96231b3b80d8
* remove support for a bunch of obsolete instruction encodingsChris Lattner2011-06-171-92/+11
| | | | | | | and other backward compatibility hacks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133273 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a useless copy of MCELFStreamer. Patch by Logan Chien!Benjamin Kramer2011-06-171-134/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133272 91177308-0d34-0410-b5e6-96231b3b80d8
* getSuccWeight returns now default 0 if Weights vector is empty.Jakub Staszak2011-06-171-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133271 91177308-0d34-0410-b5e6-96231b3b80d8
* missed a file.Chris Lattner2011-06-171-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133270 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some "2" suffixes from the metadata enums now that "1" is gone.Chris Lattner2011-06-171-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133269 91177308-0d34-0410-b5e6-96231b3b80d8
* remove bitcode reader support for LLVM 2.7 metadata encoding.Chris Lattner2011-06-172-48/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133268 91177308-0d34-0410-b5e6-96231b3b80d8
* remove another old and dead hunk of code.Chris Lattner2011-06-171-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133267 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop accepting and ignoring attributes in function types. Attributes are ↵Chris Lattner2011-06-171-10/+4
| | | | | | | | | applied to functions and call/invokes, not to types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133266 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow empty Weights vector.Jakub Staszak2011-06-171-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133265 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a few places where 32bit instructions/registerset were used on PPC64.Roman Divacky2011-06-172-4/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133260 91177308-0d34-0410-b5e6-96231b3b80d8
* Two fixes relating to debug value:Rafael Espindola2011-06-171-0/+10
| | | | | | | | * We should change the generated code because of a debug use. * Avoid creating debug uses of undef, as they become a kill. Test to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133255 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in comment.Jay Foad2011-06-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133254 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Adjust rounding modesJustin Holewinski2011-06-171-23/+38
| | | | | | | | | | | | | | | * rounding modes for fp add, mul, sub now use .rn * float -> int rounding correctly uses .rzi not .rni * 32bit fdiv for sm13 uses div.rn (instead of div.approx) * 32bit fdiv for sm10 now uses div (instead of div.approx) Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit. All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend. Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
* When promoting an alloca to registers discard any lifetime intrinsics.Nick Lewycky2011-06-171-0/+59
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133251 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a hook for PBQP clients to run a custom pre-alloc pass to run prior to ↵Lang Hames2011-06-171-4/+9
| | | | | | PBQP allocation. Patch by Arnaud Allard de Grandmaison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133249 91177308-0d34-0410-b5e6-96231b3b80d8
* make the asmparser reject function and type redefinitions. 'Merging' hasn't ↵Chris Lattner2011-06-171-21/+5
| | | | | | | | | been needed since llvm-gcc 3.4 days. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133248 91177308-0d34-0410-b5e6-96231b3b80d8
* remove asmparser support for the old getresult instruction, which has been ↵Chris Lattner2011-06-174-23/+1
| | | | | | subsumed by extractvalue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133247 91177308-0d34-0410-b5e6-96231b3b80d8
* remove parser support for the obsolete "multiple return values" syntax, whichChris Lattner2011-06-172-35/+3
| | | | | | | | was replaced with return of a "first class aggregate". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133245 91177308-0d34-0410-b5e6-96231b3b80d8
* stop accepting begin/end around function bodies in the .ll parser, this ↵Chris Lattner2011-06-173-6/+3
| | | | | | isn't pascal anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133244 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for using "foo" as symbols instead of %"foo". This is ancientChris Lattner2011-06-171-10/+3
| | | | | | | | syntax and has been long obsolete. As usual, updating the tests is the nasty part of this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133242 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable early duplication of small blocks. There are still improvements toRafael Espindola2011-06-171-29/+32
| | | | | | be made, but this is already a win. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133240 91177308-0d34-0410-b5e6-96231b3b80d8
* Allocate SystemZ callee-saved registers backwards: R13-R6Jakob Stoklund Olesen2011-06-171-7/+13
| | | | | | | | | The reserved R14-R15 are always saved in the prolog, and using CSRs starting from R13 allows them to be saved in one instruction. Thanks to Anton for explaining this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133233 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove old backwards compatibility support from the parser for autoupgradingChris Lattner2011-06-174-145/+14
| | | | | | | | | | | | | the old malloc/free instructions, and for 'sext' and 'zext' as function attributes (they are spelled signext/zeroext now), and support for result value attributes being specified after a function. Additionally, diagnose invalid attributes on functions with an error message instead of an abort in the verifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133229 91177308-0d34-0410-b5e6-96231b3b80d8
* Update an insertion point iterator after replacing a return instruction with aCameron Zwarich2011-06-171-0/+1
| | | | | | tail call pseudoinstruction. This fixes <rdar://problem/9624333>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133227 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly invoke ArrayRef constructor to keep gcc happy.Jakob Stoklund Olesen2011-06-171-12/+12
| | | | | | Patch by Richard Smith! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133220 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TRI::getAllocationOrder() to getRawAllocationOrder().Jakob Stoklund Olesen2011-06-164-59/+40
| | | | | | | | | | | Also switch the return type to ArrayRef<unsigned> which works out nicely for ARM's implementation of this function because of the clever ArrayRef constructors. The name change indicates that the returned allocation order may contain reserved registers as has been the case for a while. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133216 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use register classes larger than TLI->getRegClassFor(VT).Jakob Stoklund Olesen2011-06-161-2/+7
| | | | | | | | | | In Thumb mode we cannot handle GPR virtual registers, even though some instructions can. When isel is lowering a CopyFromReg, it should limit itself to subclasses of getRegClassFor(VT). <rdar://problem/9624323> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133210 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach antidependency breakers to use RegisterClassInfo.Jakob Stoklund Olesen2011-06-165-33/+39
| | | | | | No functional change was intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133202 91177308-0d34-0410-b5e6-96231b3b80d8
* change Type.h to forward declare ArrayRef instead of #including it.Chris Lattner2011-06-161-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133197 91177308-0d34-0410-b5e6-96231b3b80d8
* prune #includes.Chris Lattner2011-06-161-19/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133194 91177308-0d34-0410-b5e6-96231b3b80d8
* move the address space into the subclass data field, saving a word on ↵Chris Lattner2011-06-161-1/+1
| | | | | | | | | PointerType. This limits the # address spaces to 2^23, which should be good enough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133192 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up some comments, store the 'isvararg' bit for FunctionType inChris Lattner2011-06-161-2/+2
| | | | | | | the SubclassData field, saving a word. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133191 91177308-0d34-0410-b5e6-96231b3b80d8
* remove Type::getVAArgsPromotedType, which is dead, and tidy up a bit.Chris Lattner2011-06-161-9/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133190 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ARCOpt to insert releases on both successors of an invoke ratherDan Gohman2011-06-161-10/+27
| | | | | | | than trying to insert them immediately after the invoke. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133188 91177308-0d34-0410-b5e6-96231b3b80d8
* Move PBQP off allocation_order_begin. No functional change intended.Jakob Stoklund Olesen2011-06-161-5/+4
| | | | | | | I think PBQP could use RegisterClassInfo, but it didn't fit neatly with the external interfaces that PBQP uses, so I'll leave that to Lang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133186 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce MachineBranchProbabilityInfo class, which has similar API toJakub Staszak2011-06-167-19/+234
| | | | | | | | | BranchProbabilityInfo (expect setEdgeWeight which is not available here). Branch Weights are kept in MachineBasicBlocks. To turn off this analysis set -use-mbpi=false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the REG_SEQUENCE SDNode to take an explict register class ID as its ↵Owen Anderson2011-06-162-17/+29
| | | | | | | | | first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change. This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch linear scan to using RegisterClassInfo.Jakob Stoklund Olesen2011-06-161-18/+12
| | | | | | | | | This avoids the manual filtering of reserved registers and removes the dependency on allocation_order_begin(). Palliative care... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133177 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark ldrexd/strexd w/ volatile memory by defaultBruno Cardoso Lopes2011-06-161-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133175 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit.Jakub Staszak2011-06-161-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133174 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Finish new calling convention implementationJustin Holewinski2011-06-168-123/+233
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Rename register classes for readability and combine int and fp registersJustin Holewinski2011-06-167-741/+378
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133171 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TargetRegisterInfo::getRawAllocationOrder().Jakob Stoklund Olesen2011-06-163-18/+21
| | | | | | | | | | | | | This virtual function will replace allocation_order_begin/end as the one to override when implementing custom allocation orders. It is simpler to have one function return an ArrayRef than having two virtual functions computing different ends of the same array. Use getRawAllocationOrder() in place of allocation_order_begin() where it makes sense, but leave some clients that look like they really want the filtered allocation orders from RegisterClassInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment describing why transforming (shl x, 1) to (add x, x) is to beDan Gohman2011-06-161-0/+5
| | | | | | | considered safe enough in this context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159 91177308-0d34-0410-b5e6-96231b3b80d8
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