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* reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner2010-09-2110-66/+85
| | | | | | | | instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
* add some helpful accessors.Chris Lattner2010-09-211-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114400 91177308-0d34-0410-b5e6-96231b3b80d8
* add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take aChris Lattner2010-09-211-18/+47
| | | | | | | | MachinePointerInfo. Among other virtues, this doesn't silently truncate the svoffset to 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner2010-09-212-6/+6
| | | | | | MachinePointerInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
* chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner2010-09-212-12/+4
| | | | | | | eliminating some weird "infer a frame address" logic which was dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
* don't implicitly drop the offset of a machinememoperand when legalizing atomics.Chris Lattner2010-09-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
* force clients of MachineFunction::getMachineMemOperand to provide aChris Lattner2010-09-213-24/+15
| | | | | | | | MachinePointerInfo, propagating the type out a level of API. Remove the old MachineFunction::getMachineMemOperand impl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
* convert targets to the new MF.getMachineMemOperand interface.Chris Lattner2010-09-219-30/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114391 91177308-0d34-0410-b5e6-96231b3b80d8
* start pushing MachinePointerInfo out through the MachineMemOperand interfaceChris Lattner2010-09-212-9/+16
| | | | | | | to the MachineFunction construction methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114390 91177308-0d34-0410-b5e6-96231b3b80d8
* refactor the Value*/offset pair from MachineMemOperand out to a newChris Lattner2010-09-211-5/+5
| | | | | | | | | | MachinePointerInfo struct, no functionality change. This also adds an assert to MachineMemOperand::MachineMemOperand that verifies that the Value* is either null or is an IR pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114389 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8453210, a crash handling a call through a GS relative load.Chris Lattner2010-09-211-1/+7
| | | | | | | For now, just disable folding the load into the call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert unrelated change that was accidentally included in the previous commit.Rafael Espindola2010-09-211-4/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114383 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for .local and its "interesting" interactions with .comm.Rafael Espindola2010-09-213-11/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine sinking critical edge splitting. e.g.Evan Cheng2010-09-201-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 %z = select i1 %c, double %a, double %y ret double %z } Was: _foo: divsd LCPI0_0(%rip), %xmm0 testb $1, %dil jne LBB0_2 movaps %xmm1, %xmm0 LBB0_2: ret Now: _foo: testb $1, %dil je LBB0_2 divsd LCPI0_0(%rip), %xmm0 ret LBB0_2: movaps %xmm1, %xmm0 ret This avoids the divsd when early exit is taken. rdar://8454886 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
* When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson2010-09-201-2/+13
| | | | | | | | | | | | | Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify ARM callee-saved register handling by removing the distinctionJim Grosbach2010-09-203-167/+59
| | | | | | | | | | | | | | | | | | | | | between the high and low registers for prologue/epilogue code. This was a Darwin-only thing that wasn't providing a realistic benefit anymore. Combining the save areas simplifies the compiler code and results in better ARM/Thumb2 codegen. For example, previously we would generate code like: push {r4, r5, r6, r7, lr} add r7, sp, #12 stmdb sp!, {r8, r10, r11} With this change, we combine the register saves and generate: push {r4, r5, r6, r7, r8, r10, r11, lr} add r7, sp, #12 rdar://8445635 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
* Produce a R_X86_64_32 when the value is >=0.Rafael Espindola2010-09-201-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid splitting critical edge twice for a set of PHI uses.Evan Cheng2010-09-201-17/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114338 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the "unable to rename temporary" lit test failing on Windows. rename is ↵Francois Pichet2010-09-201-4/+11
| | | | | | now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114320 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r114312 while I sort out some issues.Owen Anderson2010-09-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
* Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,Owen Anderson2010-09-191-1/+1
| | | | | | | | r114268 fixed the last of the blockers to enabling it. I will be monitoring for failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
* Add one more Core i7 model number.Jakob Stoklund Olesen2010-09-191-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114310 91177308-0d34-0410-b5e6-96231b3b80d8
* idiom recognition should catch this.Chris Lattner2010-09-191-0/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114304 91177308-0d34-0410-b5e6-96231b3b80d8
* add a readme.Chris Lattner2010-09-191-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114303 91177308-0d34-0410-b5e6-96231b3b80d8
* add corei7, the laptop version.Chris Lattner2010-09-191-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114302 91177308-0d34-0410-b5e6-96231b3b80d8
* X86Subtarget.h: Fix Cygwin's TD.NAKAMURA Takumi2010-09-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114297 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the exit instruction to the PTX target.Eric Christopher2010-09-1822-16/+705
| | | | | | | Patch by Che-Liang Chiou <clchiou@gmail.com>! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix build.Michael J. Spencer2010-09-181-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114292 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure the STT_FILE symbol is the first one in the symbol table.Rafael Espindola2010-09-181-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak msvc build.Benjamin Kramer2010-09-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114284 91177308-0d34-0410-b5e6-96231b3b80d8
* do not rely on the implicit-dereference semantics of dyn_cast_or_nullGabor Greif2010-09-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114278 91177308-0d34-0410-b5e6-96231b3b80d8
* do not rely on the implicit-dereference semantics of dyn_cast_or_nullGabor Greif2010-09-181-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114277 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed non-const iterator error.Lang Hames2010-09-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114273 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a separate class (PBQPBuilder) for PBQP Problem construction. This ↵Lang Hames2010-09-187-2300/+309
| | | | | | | | | | | | | | class can be extended to support custom constraints. For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming no issues with the builder system come up. To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114272 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix code that break critical edges for PHI uses. Watch out for multiple PHIs ↵Evan Cheng2010-09-181-71/+66
| | | | | | in different blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114270 91177308-0d34-0410-b5e6-96231b3b80d8
* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-181-7/+7
| | | | | | | | | | | is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb opcodes for thumb calls.Eric Christopher2010-09-181-1/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114263 91177308-0d34-0410-b5e6-96231b3b80d8
* Add addrmode5 fp load support. Swap float/thumb operand adding to handleEric Christopher2010-09-181-5/+21
| | | | | | | thumb with floating point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114256 91177308-0d34-0410-b5e6-96231b3b80d8
* Floating point stores have a 3rd addressing mode type.Eric Christopher2010-09-181-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114254 91177308-0d34-0410-b5e6-96231b3b80d8
* factor out a simple helper function to create a label for PC-relativeJim Grosbach2010-09-181-19/+17
| | | | | | instructions (PICADD, PICLDR, et.al.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114243 91177308-0d34-0410-b5e6-96231b3b80d8
* PC-relative pseudo instructions are lowered and printed directly. Any encounterJim Grosbach2010-09-181-3/+2
| | | | | | with one in the generic printing code is an error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114242 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer2010-09-171-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114240 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MC-inst handling for tPICADDJim Grosbach2010-09-171-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114237 91177308-0d34-0410-b5e6-96231b3b80d8
* Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64Bob Wilson2010-09-171-0/+27
| | | | | | | | | value should be in GPRs when it's going to be used as a scalar, and we use VMOVRRD to make that happen, but if the value is converted back to a vector we need to fold to a simple bit_convert. Radar 8407927. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the (non-MC) instruction printer to use the cannonical names for push/pop,Jim Grosbach2010-09-172-4/+72
| | | | | | and shift instructions on ARM. Update the tests to match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114230 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid relocations in a common case.Rafael Espindola2010-09-171-1/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114229 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine sink toEvan Cheng2010-09-171-68/+218
| | | | | | | | | | | 1) Do forward copy propagation. This makes it easier to estimate the cost of the instruction being sunk. 2) Break critical edges on demand, including cases where the value is used by PHI nodes. Critical edge splitting is not yet enabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework arm fast isel branch and compare code.Eric Christopher2010-09-171-8/+70
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114226 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine CSE was forgetting to clear some data structures.Evan Cheng2010-09-171-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114222 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a potential bug that can cause miscomparison with and without debug info.Evan Cheng2010-09-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114220 91177308-0d34-0410-b5e6-96231b3b80d8
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