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* [code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet2012-10-271-0/+34
* Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen2012-10-262-2/+2
* Fix a miscompilation caused by a typo. When turning a adde with negative valueEvan Cheng2012-10-241-0/+13
* When a block ends in an indirect branch, add its successors to the machine ba...Bill Wendling2012-10-221-0/+46
* This patch is to fix radar://8426430. It is about llvm support of __builtin_d...Shuxin Yang2012-10-191-0/+12
* ARM:Stepan Dyatkovskiy2012-10-191-0/+29
* Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen2012-10-161-1/+1
* Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola2012-10-161-1/+1
* Issue:Stepan Dyatkovskiy2012-10-162-12/+61
* ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach2012-10-151-0/+30
* Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga2012-10-151-0/+36
* Drop <def,dead> flags when merging into an unused lane.Jakob Stoklund Olesen2012-10-131-1/+27
* Allow for loops in LiveIntervals::pruneValue().Jakob Stoklund Olesen2012-10-131-0/+49
* ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren2012-10-122-0/+49
* ARM: Mark VSELECT as 'expand'.Jim Grosbach2012-10-121-0/+12
* Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng2012-10-121-12/+34
* Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng2012-10-101-0/+18
* Fix for LDRB instruction:Stepan Dyatkovskiy2012-10-101-0/+23
* Issue description:Stepan Dyatkovskiy2012-10-101-0/+19
* ARM: locate user-defined text sections next to default text.Jim Grosbach2012-10-041-0/+21
* Fixed a bug in the ExecutionDependencyFix pass that caused dependencies to no...Silviu Baranga2012-10-031-0/+22
* Make sure the whole live range is covered when values are pruned twice.Jakob Stoklund Olesen2012-10-021-1/+26
* Add LLVM support for Swift.Bob Wilson2012-09-2922-32/+200
* Whitespace.Bob Wilson2012-09-291-2/+2
* Enable the new coalescer algorithm by default.Jakob Stoklund Olesen2012-09-271-1/+0
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-271-0/+18
* ARM/atomicrmw_minmax.ll: Fix RUN line.NAKAMURA Takumi2012-09-261-1/+1
* Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.James Molloy2012-09-261-0/+21
* Generate an error message instead of asserting or segfaulting when we have aBill Wendling2012-09-261-0/+11
* Generate an error message instead of asserting or segfaulting when we have aBill Wendling2012-09-261-0/+11
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+36
* llvm/test/CodeGen/ARM/fast-isel.ll: Fix possible typos, s/@unaligned_i16_stor...NAKAMURA Takumi2012-09-211-2/+2
* Testcase does not need to be this strict.Chad Rosier2012-09-211-1/+1
* Add newline.Chad Rosier2012-09-211-1/+1
* [fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier2012-09-211-0/+30
* ARM: Use a dedicated intrinsic for vector bitwise select.Jim Grosbach2012-09-211-0/+49
* Ignore PHI-defs for -new-coalescer interference checks.Jakob Stoklund Olesen2012-09-201-0/+48
* Try to make these tests more portable.Evan Cheng2012-09-203-7/+7
* Resolve conflicts involving dead vector lanes for -new-coalescer.Jakob Stoklund Olesen2012-09-191-0/+27
* MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648Evan Cheng2012-09-182-1/+12
* More domain conversion; convert VFP VMOVS to NEON instructions in more cases ...James Molloy2012-09-181-2/+18
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-188-46/+549
* Merge into undefined lanes under -new-coalescer.Jakob Stoklund Olesen2012-09-171-1/+49
* Removed the VMLxForwarding feature for the Cortex-A15 target.Silviu Baranga2012-09-171-0/+12
* This patch introduces A15 as a target in LLVM.Silviu Baranga2012-09-131-0/+6
* Fix constant folding through bitcasts by no longer relying on undefined behav...Kristof Beyls2012-09-121-0/+10
* Don't attempt to use flags from predicated instructions.Jakob Stoklund Olesen2012-09-101-0/+21
* Fix an assertion failure when optimising a shufflevector incorrectly into con...James Molloy2012-09-101-0/+10
* Set operation action for FFLOOR to Expand for all vector types for X86. Set F...Craig Topper2012-09-081-0/+31
* Improve codegen for BUILD_VECTORs on ARM.James Molloy2012-09-061-0/+34
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