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* Do not use '&' prefix for globals when register base field is non-zero, ↵Anton Korobeynikov2010-03-064-8/+8
| | | | | | | | otherwise msp430-as will silently miscompile the code (TI's assembler report an error though). This fixes PR6349 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97877 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some issues in WalkChainUsers dealing with Chris Lattner2010-03-021-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CopyToReg/CopyFromReg/INLINEASM. These are annoying because they have the same opcode before an after isel. Fix this by setting their NodeID to -1 to indicate that they are selected, just like what automatically happens when selecting things that end up being machine nodes. With that done, give IsLegalToFold a new flag that causes it to ignore chains. This lets the HandleMergeInputChains routine be the one place that validates chains after a match is successful, enabling the new hotness in chain processing. This smarter chain processing eliminates the need for "PreprocessRMW" in the X86 and MSP430 backends and enables MSP to start matching it's multiple mem operand instructions more aggressively. I currently #if out the dead code in the X86 backend and MSP backend, I'll remove it for real in a follow-on patch. The testcase changes are: test/CodeGen/X86/sse3.ll: we generate better code test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was miscompiling this before, we now generate correct code Convert it to filecheck while I'm at it. test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem folding to make anton happy. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-241-1/+1
| | | | | | | | | | | | | | | | | | | to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
* no need to run llvm-as here.Chris Lattner2010-02-225-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96826 91177308-0d34-0410-b5e6-96231b3b80d8
* IT turns out that during jumpless setcc lowering eq and ne were swapped.Anton Korobeynikov2010-02-211-22/+22
| | | | | | This fixes PR6348 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96734 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable testsAnton Korobeynikov2010-01-152-8/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93555 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporary disable testsAnton Korobeynikov2010-01-152-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93501 91177308-0d34-0410-b5e6-96231b3b80d8
* Add variable-width shifts for MSP430Anton Korobeynikov2010-01-141-0/+51
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93468 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete useless trailing semicolons.Dan Gohman2010-01-051-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
* Use more sensible type for flags in asms. PR 5570.Dale Johannesen2009-12-231-0/+29
| | | | | | | | Patch by Sylve`re Teissier (sorry, ASCII only). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for PR5703Anton Korobeynikov2009-12-221-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91931 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower setcc branchless, if this is profitable.Anton Korobeynikov2009-12-111-0/+116
| | | | | | Based on the patch by Brian Lucas! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra ↵Anton Korobeynikov2009-12-081-0/+166
| | | | | | instruction. Patch inspired by Brian Lucas! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
* While this test is testing a problem in the generic part of codegen,Duncan Sands2009-11-271-0/+36
| | | | | | | | | | the problem only shows for msp430 and pic16 which is why it specifies them using -march. But it is wrong to put such tests in CodeGen/Generic, since not everyone builds these targets. Put a copy of the test in each of the target test directories. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90005 91177308-0d34-0410-b5e6-96231b3b80d8
* Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!Anton Korobeynikov2009-11-086-2/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix invalid operand updates & implement post-inc memory operandsAnton Korobeynikov2009-11-081-1/+90
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
* It is invalid to infer the value type from the result #0 of the nodeAnton Korobeynikov2009-11-081-0/+64
| | | | | | since the instruction might use the other result of different type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86462 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some dummy support for post-incremented loadsAnton Korobeynikov2009-11-071-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 8 bit libcalls and make use of them for msp430Anton Korobeynikov2009-11-071-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial support for addrmode handling. Tests by Brian Lucas!Anton Korobeynikov2009-11-076-2/+292
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
* Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be ↵Anton Korobeynikov2009-10-222-2/+0
| | | | | | | | selected. Yay for ASCII graphics! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DAG printing for RMW stuff debuggingAnton Korobeynikov2009-10-212-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
* RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and ↵Anton Korobeynikov2009-10-212-0/+2
| | | | | | disable some tests until it will be clever enough to handle them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
* Add reg-imm testsAnton Korobeynikov2009-10-212-0/+74
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84705 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate some redundant llvm-as calls.Benjamin Kramer2009-10-1210-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missed mem-mem move patternsAnton Korobeynikov2009-10-112-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83812 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MSP430 mem-mem insts support. Patch by Brian Lucas with some my refinementsAnton Korobeynikov2009-10-112-0/+93
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83811 91177308-0d34-0410-b5e6-96231b3b80d8
* Add bunch of MSP430 'feature' tests. Patch by Brian Lucas with some my ↵Anton Korobeynikov2009-10-118-0/+343
| | | | | | refinements git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83809 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement 'm' memory operand properlyAnton Korobeynikov2009-10-111-11/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83785 91177308-0d34-0410-b5e6-96231b3b80d8
* It seems that OR operation does not affect status reg at all.Anton Korobeynikov2009-10-101-0/+14
| | | | | | | Remove impdef of SRW. This fixes PR4779 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow symbols to start from the digit if target requests it. This allows, ↵Anton Korobeynikov2009-09-181-0/+22
| | | | | | | | | e.g. pinning variables to specified absolute address. Make use of this feature for MSP430. This unbreaks PR4776. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82227 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-096-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* Add dummy inline asm handling for 'r' constraint. This fixes PR4778Anton Korobeynikov2009-08-261-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80085 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide dynamic_stackalloc lowering for MSP430.Anton Korobeynikov2009-08-251-0/+30
| | | | | | This fixes PR4769 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80001 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the Add, Sub, and Mul instruction opcodes into separateDan Gohman2009-06-041-1/+1
| | | | | | | | | | | | | | | | integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for PR4235: to build a floating-point value from integer parts, Eli Friedman2009-05-201-0/+11
| | | | | | | | | | | | | | build an integer and cast that to a float. This fixes a crash caused by trying to split an f32 into two f16's. This changes the behavior in test/CodeGen/XCore/fneg.ll because that testcase now triggers a DAGCombine which converts the fneg into an integer operation. If someone is interested, it's probably possible to tweak the test to generate an actual fneg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72162 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark rotl/rotr as expand. This generates pretty ugly code, but this is ↵Anton Korobeynikov2009-05-171-0/+17
| | | | | | better than nothing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71976 91177308-0d34-0410-b5e6-96231b3b80d8
* TypoAnton Korobeynikov2009-05-171-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MSP430 test for PR4136Anton Korobeynikov2009-05-102-0/+37
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71392 91177308-0d34-0410-b5e6-96231b3b80d8
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