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* Add triple to test/CodeGen/PowerPC/stfiwx-2Hal Finkel2013-04-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178486 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more PPC floating-point conversion instructionsHal Finkel2013-04-011-3/+6
| | | | | | | | | The P7 and A2 have additional floating-point conversion instructions which allow a direct two-instruction sequence (plus load/store) to convert from all combinations (signed/unsigned i32/i64) <--> (float/double) (on previous cores, only some combinations were directly available). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178480 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:Chris Lattner2008-01-181-0/+11
_test: fctiwz f0, f1 stfiwx f0, 0, r4 blr instead of: _test: fctiwz f0, f1 stfd f0, -8(r1) nop nop lwz r2, -4(r1) stb r2, 0(r4) blr The former is not correct (stores 4 bytes, not 1). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46161 91177308-0d34-0410-b5e6-96231b3b80d8