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* add a test case that uses RESTORE_CRHal Finkel2011-12-061-0/+225
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145962 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case - this input used to crash because of duplicate generation of ↵Hal Finkel2011-12-051-0/+191
| | | | | | SPILL_CRs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145820 91177308-0d34-0410-b5e6-96231b3b80d8
* enable PPC register scavenging by default (update tests and remove some FIXMEs)Hal Finkel2011-12-056-20/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8
* remove wasted space for extra bit copies of CR2 subregsHal Finkel2011-12-051-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8
* specify cpu for test to fix failure on some darwin systems with a g4+ cpuHal Finkel2011-12-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145699 91177308-0d34-0410-b5e6-96231b3b80d8
* adjust the instruction ordering in some PPC tests: changes due to postRA ↵Hal Finkel2011-12-024-8/+23
| | | | | | haz. rec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145678 91177308-0d34-0410-b5e6-96231b3b80d8
* Upgrade syntax of tests using volatile instructions to use 'load volatile' ↵Chris Lattner2011-11-271-3/+3
| | | | | | instead of 'volatile load', which is archaic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145171 91177308-0d34-0410-b5e6-96231b3b80d8
* add basic PPC register-pressure feedback; adjust the vaarg test to match the ↵Hal Finkel2011-11-221-92/+90
| | | | | | new register-allocation pattern git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145065 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark ↵NAKAMURA Takumi2011-10-281-0/+4
| | | | | | "REQUIRES: asserts" for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143247 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-244-128/+100
| | | | | | | is going away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
* use FileCheck and not grep in new testsHal Finkel2011-10-172-5/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142189 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for CanLowerReturn fix (r141981)Hal Finkel2011-10-171-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142172 91177308-0d34-0410-b5e6-96231b3b80d8
* Add PPC 440 scheduler and some associated tests (new files)Hal Finkel2011-10-172-0/+55
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142171 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more tests over to the new atomic instructions. Eli Friedman2011-09-264-1493/+1366
| | | | | | | | | | I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output. The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140566 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove ancient debug info constructs from test cases, they are not relevant ↵Devang Patel2011-09-141-7/+0
| | | | | | to test case's main objective. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139675 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands2011-09-061-2/+4
| | | | | | | | | | | | | | | | | | | | | init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139140 91177308-0d34-0410-b5e6-96231b3b80d8
* Update more tests to the new EH scheme.Bill Wendling2011-08-311-12/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138894 91177308-0d34-0410-b5e6-96231b3b80d8
* Set CR1EQ only when lowering vararg floating arguments (not any varargRoman Divacky2011-08-301-0/+18
| | | | | | | arguments as before), unset CR1EQ otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MCObjectFileInfo and sink the MCSections initialization code fromEvan Cheng2011-07-201-1/+1
| | | | | | | | | TargetLoweringObjectFileImpl down to MCObjectFileInfo. TargetAsmInfo is done to one last method. It's *almost* gone! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135569 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheck-ize a couple tests.Eli Friedman2011-07-182-4/+22
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* test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See ↵NAKAMURA Takumi2011-07-111-1/+1
| | | | | | also r134814 (test/CodeGen/X86/vector.ll). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134900 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement ISD::VAARG lowering on PPC32.Roman Divacky2011-06-281-0/+167
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* Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflowRoman Divacky2011-06-201-0/+29
| | | | | | | with 32bit values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133439 91177308-0d34-0410-b5e6-96231b3b80d8
* rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which isChris Lattner2011-06-185-213/+28
| | | | | | | | | | | for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a few places where 32bit instructions/registerset were used on PPC64.Roman Divacky2011-06-171-0/+14
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* remove parser support for the obsolete "multiple return values" syntax, whichChris Lattner2011-06-171-17/+0
| | | | | | | | was replaced with return of a "first class aggregate". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133245 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for using "foo" as symbols instead of %"foo". This is ancientChris Lattner2011-06-172-2/+0
| | | | | | | | syntax and has been long obsolete. As usual, updating the tests is the nasty part of this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133242 91177308-0d34-0410-b5e6-96231b3b80d8
* manually upgrade a bunch of tests to modern syntax, and remove some thatChris Lattner2011-06-178-18/+13
| | | | | | | | are either unreduced or only test old syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.Roman Divacky2011-06-031-0/+4
| | | | | | | | | | | | | | - Check for MTCTR8 in addition to MTCTR when looking up a hazard. - When lowering an indirect call use CTR8 when targeting 64bit. - Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND. The last change fixes PR8487. With those changes, we are able to compile a running "ls" and "sh" on FreeBSD/PowerPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132552 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheckize and break dependence on coalescing order.Jakob Stoklund Olesen2011-05-041-8/+6
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* Explicitly request -join-physregs for some tests that depend on it.Jakob Stoklund Olesen2011-05-041-1/+1
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* Add 130690 back.Rafael Espindola2011-05-022-4/+2
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* Revert while I debug the tests that use march but not mtriple.Rafael Espindola2011-05-022-2/+4
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* Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will ↵Rafael Espindola2011-05-022-4/+2
| | | | | | take some time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130690 91177308-0d34-0410-b5e6-96231b3b80d8
* Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm.Rafael Espindola2011-05-011-1/+1
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* Revert the previous patch while I figure out how to make llvm-gccRafael Espindola2011-04-301-1/+1
| | | | | | less agressive about disabling cfi on linux :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable CFI on OS X.Rafael Espindola2011-04-301-1/+1
| | | | | | | | | | | | | | | Currently the output should be almost identical to the one produced by CodeGen to make the transition easier. The only two differences I know of are: * Some files get an extra advance loc of size 0. This will be fixed when relaxations are enabled. * The optimization of declaring an EH symbol as an external variable is not implemented. This is a subset of adding the nounwind attribute, so we if really this at -O0 we should probably do it at the IL level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
* These tests no longer require linear scan because reserved register ↵Jakob Stoklund Olesen2011-04-051-1/+2
| | | | | | coalescing is now universal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128936 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable the PowerPC/Atomics-64 test.Jakob Stoklund Olesen2011-04-041-2/+8
| | | | | | | | The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is wrong, and I don't know how to fix it. It seems to be using the correct register classes for pointers, but it inserts all 32-bit instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128835 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PowerPC tests to be register allocator independent.Jakob Stoklund Olesen2011-04-042-8/+8
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* Fix mistyped CHECK lines.Benjamin Kramer2011-03-091-1/+1
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* Be nice to Xcore and the XMOS assembler and avoid quoting section namesJoerg Sonnenberger2011-03-041-1/+1
| | | | | | | that contain only letters, digits and the characters "_" and ".". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
* Bug#9033: For the ELF assembler output, always quote the section name.Joerg Sonnenberger2011-03-031-1/+1
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* Restore the behavior of frame lowering before my refactoring.Anton Korobeynikov2010-12-181-0/+22
| | | | | | | | | It turns out that ppc backend has really weird interdependencies over different hooks and all stuff is fragile wrt small changes. This should fix PR8749 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122155 91177308-0d34-0410-b5e6-96231b3b80d8
* If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG ↵Devang Patel2010-12-061-24/+19
| | | | | | message instead of creating DBG_VALUE for undefined value in reg0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a pointless testcase.Chris Lattner2010-11-151-585/+0
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* remove some extraneous quotes to make the new instprinter match.Chris Lattner2010-11-151-2/+2
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* add some nounwind's.Chris Lattner2010-11-145-6/+6
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* Inline asm mult-alt constraint tests.John Thompson2010-11-022-0/+642
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* PowerPC varargs functions store live-in registers on the stack. Make sure we useJakob Stoklund Olesen2010-10-111-0/+16
| | | | | | | | | virtual registers for those stores since RegAllocFast requires that each live physreg only be used once. This fixes PR8357. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116222 91177308-0d34-0410-b5e6-96231b3b80d8