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	Commit message (Collapse)	Author	Age	Files	Lines
*	R600: Use function inputs to represent data stored in gpr	Vincent Lejeune	2013-11-11	1	-6/+7
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194425 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Fix handling of NAN in comparison instructions	Tom Stellard	2013-09-28	1	-1/+1
\| \| \| \| \| \| \| \| \|	We were completely ignoring the unorder/ordered attributes of condition codes and also incorrectly lowering seto and setuo. Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191603 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Schedule copy from phys register at beginning of block	Vincent Lejeune	2013-06-05	1	-1/+1
\| \| \| \| \| \|	It allows regalloc pass to remove them by trivially assigning associated reg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: use capital letter for PV channel	Vincent Lejeune	2013-06-03	1	-1/+1
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183107 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Use bottom up scheduling algorithm	Vincent Lejeune	2013-05-17	1	-1/+1
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182129 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Prettier asmPrint of Alu	Vincent Lejeune	2013-05-02	1	-1/+1
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add R600 backend	Tom Stellard	2012-12-11	1	-0/+16
	A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8