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	Commit message (Collapse)	Author	Age	Files	Lines
*	Update aosp/master llvm for rebase to r233350	Pirama Arumuga Nainar	2015-04-09	1	-2/+2
\| \| \| \|	Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
*	Update aosp/master LLVM for rebase to r230699.	Stephen Hines	2015-03-23	1	-43/+445
\| \| \| \|	Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
*	Update aosp/master LLVM for rebase to r222494.	Stephen Hines	2014-12-02	1	-9/+201
\| \| \| \|	Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
*	R600/SI: Change formatting of printed registers.	Matt Arsenault	2013-11-12	1	-6/+6
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Print the range of registers used with a single letter prefix. This better matches what the shader compiler produces and is overall less obnoxious than concatenating all of the subregister names together. Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1, it will print s[0:1] and so on. There doesn't appear to be a straightforward way to get the actual register info in the InstPrinter, so this parses the generated name to print with the new syntax. The required test changes are pretty nasty, and register matching regexes are now worse. Since there isn't a way to add to a variable in FileCheck, some of the tests now don't check the exact number of registers used, but I don't think that will be a real problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600/SI: Use -verify-machineinstrs for most tests	Tom Stellard	2013-10-10	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \|	We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192366 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600/SI: Add support for buffer stores v2	Tom Stellard	2013-04-05	1	-3/+0
\| \| \| \| \| \| \| \| \|	v2: - Use the ADDR64 bit Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178931 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600/SI: Add processor types for each SI variant	Tom Stellard	2013-04-05	1	-1/+1
\| \| \| \| \| \|	Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178928 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600/SI: Avoid generating S_MOVs with 64-bit immediates v2	Tom Stellard	2013-04-05	1	-0/+26
	SITargetLowering::analyzeImmediate() was converting the 64-bit values to 32-bit and then checking if they were an inline immediate. Some of these conversions caused this check to succeed and produced S_MOV instructions with 64-bit immediates, which are illegal. v2: - Clean up logic Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178927 91177308-0d34-0410-b5e6-96231b3b80d8