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* Fix more register and coalescing dependencies.Jakob Stoklund Olesen2011-05-041-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130859 91177308-0d34-0410-b5e6-96231b3b80d8
* Make tests more useful.Benjamin Kramer2011-04-251-1/+1
| | | | | | lit needs a linter ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130126 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the bfi handling for or (and a mask) (and b mask). We need the twoEric Christopher2011-03-261-0/+11
| | | | | | | | | | | | | | | masks to match inversely for the code as is to work. For the example given we actually want: bfi r0, r2, #1, #1 not #0, however, given the way the pattern is written it's not possible at the moment. Fixes rdar://9177502 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128320 91177308-0d34-0410-b5e6-96231b3b80d8
* (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == ↵Evan Cheng2010-12-111-0/+11
| | | | | | #shamt. rdar://8752056 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121606 91177308-0d34-0410-b5e6-96231b3b80d8
* Add combiner patterns to more effectively utilize the BFI (bitfield insert)Jim Grosbach2010-07-171-0/+23
| | | | | | | | | instruction for non-constant operands. This includes the case referenced in the README.txt regarding a bitfield copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108608 91177308-0d34-0410-b5e6-96231b3b80d8
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-0/+17
and a combine pattern to use it for setting a bit-field to a constant value. More to come for non-constant stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108570 91177308-0d34-0410-b5e6-96231b3b80d8