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* Try trivial remat before the coalescer gives up on a vr / physreg coalescing ↵Evan Cheng2010-03-261-0/+9
| | | | | | for fear of tying up a physical register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99575 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the NDEBUG assertion stronger and more clear what is Chris Lattner2010-03-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | happening. Enhance scheduling to set the DEAD flag on implicit defs more aggressively. Before, we'd set an implicit def operand to dead if it were present in the SDNode corresponding to the machineinstr but had no use. Now we do it in this case AND if the implicit def does not exist in the SDNode at all. This exposes a couple of problems: one is the FIXME, which causes a live intervals crash on CodeGen/X86/sibcall.ll. The second is that it makes machinecse and licm more aggressive (which is a good thing) but also exposes a case where licm hoists a set0 and then it doesn't get resunk. Talking to codegen folks about both these issues, but I need this patch in in the meantime. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99485 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this test less trivial, to avoid spurious failures.Dan Gohman2010-01-111-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93156 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineLICM CSE should match destination register classes; avoid hoisting ↵Evan Cheng2009-02-271-0/+47
implicit_def's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65592 91177308-0d34-0410-b5e6-96231b3b80d8