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path: root/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
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* Revert r122955. It seems using movups to lower memcpy can cause massive ↵Evan Cheng2011-01-071-4/+4
| | | | | | regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123015 91177308-0d34-0410-b5e6-96231b3b80d8
* Use movups to lower memcpy and memset even if it's not fast (like corei7).Evan Cheng2011-01-061-4/+4
| | | | | | | | | The theory is it's still faster than a pair of movq / a quad of movl. This will probably hurt older chips like P4 but should run faster on current and future Intel processors. rdar://8817010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122955 91177308-0d34-0410-b5e6-96231b3b80d8
* When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson2010-09-201-4/+4
| | | | | | | | | | | | | Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-181-0/+26
is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8