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* Force a triple on a couple of tests; we don't support fast-isel of ret on Win64.Eli Friedman2011-05-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131540 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some of the fast-isel tests actually test fast-isel (and fix test ↵Eli Friedman2011-05-181-12/+17
| | | | | | failures). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131510 91177308-0d34-0410-b5e6-96231b3b80d8
* Fast-isel support for simple inline asms.Dan Gohman2011-04-261-0/+1
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* Recommit the fix for rdar://9289512 with a couple tweaks toChris Lattner2011-04-221-0/+10
| | | | | | | | | | | | | fix bugs exposed by the gcc dejagnu testsuite: 1. The load may actually be used by a dead instruction, which would cause an assert. 2. The load may not be used by the current chain of instructions, and we could move it past a side-effecting instruction. Change how we process uses to define the problem away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130018 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-8/+6
| | | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-8/+6
| | | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-6/+8
| | | | | | | Debug info intrinsics win for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman2010-07-071-8/+6
| | | | | | | a separate DCE pass over MachineInstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge a few fast-isel tests.Dan Gohman2010-04-091-0/+21
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* Revert commit 93204, since it causes the assembler to barfDuncan Sands2010-01-121-1/+1
| | | | | | | | on x86-64 linux with messages like this: Error: Incorrect register `%r14' used with `l' suffix git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93242 91177308-0d34-0410-b5e6-96231b3b80d8
* Add manual ISD::OR fastisel selection routines. TableGen is no longer ↵Evan Cheng2010-01-111-1/+1
| | | | | | autogen them after 93152 and 93191. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93204 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend r93152 to work on OR r, r. If the source set bits are known not to ↵Evan Cheng2010-01-111-1/+1
| | | | | | overlap, then select as an ADD instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
* X86FastISel support for loading and storing values of type i1.Dan Gohman2009-08-271-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80186 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the Add, Sub, and Mul instruction opcodes into separateDan Gohman2009-06-041-4/+4
| | | | | | | | | | | | | | | | integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a few more ptrtoint/inttoptr cast tests.Dan Gohman2009-03-131-2/+10
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* Improve FastISel's handling of truncates to i1, and implementDan Gohman2009-03-131-1/+10
| | | | | | | | | ptrtoint and inttoptr in X86FastISel. These casts aren't always handled in the generic FastISel code because X86 sometimes needs custom code to do truncation and zero-extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8
* Load from GV stub should be locally CSE'd.Evan Cheng2008-09-041-8/+0
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* Add X86 target hook to implement load (even from GlobalAddress).Evan Cheng2008-09-031-3/+11
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* This test crashes on non-x86 host; make SSE explicit.Dale Johannesen2008-08-281-1/+1
| | | | | | | | Feel free to fix a better way! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55456 91177308-0d34-0410-b5e6-96231b3b80d8
* Basic FastISel support for floating-point constants.Dan Gohman2008-08-271-1/+2
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* Add support for fast isel of (integer) immediate materialization pattens, ↵Owen Anderson2008-08-251-0/+5
| | | | | | | | | and use them to support bitcast of constants in fast isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-221-1/+1
| | | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -mattr=sse2 so this test doesn't fail on non-x86 hosts.Dan Gohman2008-08-211-1/+1
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* getelementptr doesn't work on x86-64 yet, because itDan Gohman2008-08-211-1/+0
| | | | | | | has MOV64ri32 and no plain MOV64ri. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55126 91177308-0d34-0410-b5e6-96231b3b80d8
* MVT::getMVT uses iPTR for pointer types, while we need the actualDan Gohman2008-08-211-2/+5
| | | | | | | | intptr_t type in this case. FastISel can now select simple getelementptr instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55125 91177308-0d34-0410-b5e6-96231b3b80d8
* Basic fast-isel support for instructions with constant int operands.Dan Gohman2008-08-211-1/+2
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* Add a -march line for this test, and run it on x86-64 too for fun.Dan Gohman2008-08-201-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55030 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FastISel support for floating-point operations.Dan Gohman2008-08-201-1/+17
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* Add FastISel support for several more binary operators.Dan Gohman2008-08-201-2/+8
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* Fast-isel is now *minimally* functional. Add a testcase toDan Gohman2008-08-191-0/+17
demonstrate the extent of its capabilities. Note that it only attempts to operate on one of the blocks in this testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55016 91177308-0d34-0410-b5e6-96231b3b80d8
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