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* TargetLowering: Use the large shift amount during legalize types. The ↵Benjamin Kramer2012-08-171-0/+32
| | | | | | legalizer may call us with an overly large type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken check lines.Benjamin Kramer2012-08-174-15/+15
| | | | | | | | I really need to find a way to automate this, but I can't come up with a regex that has no false positives while handling tricky cases like custom check prefixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162097 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove invalid test. This test requires that dead basic blocks be keptBill Wendling2012-08-151-19/+0
| | | | | | | | | | | | | | | | | around. That's not how we do things. Besides, the commit message tells us that it is covered by the GCC test suite. ------------------------------------------------------------------------ r127497 | zwarich | 2011-03-11 13:51:56 -0800 (Fri, 11 Mar 2011) | 3 lines Fix the GCC test suite issue exposed by r127477, which was caused by stack protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161985 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR11334Michael Liao2012-08-141-0/+56
| | | | | | | | | | | | | | - FP_EXTEND only support extending from vectors with matching elements. This results in the scalarization of extending to v2f64 from v2f32, which will be legalized to v4f32 not matching with v2f64. - add X86-specific VFPEXT supproting extending from v4f32 to v2f64. - add BUILD_VECTOR lowering helper to recover back the original extending from v4f32 to v2f64. - test case is enhanced to include different vector width. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161894 91177308-0d34-0410-b5e6-96231b3b80d8
* During the CodeGenPrepare we often lower intrinsics (such as objsize)Nadav Rotem2012-08-143-6/+6
| | | | | | | | | | | | | and allow some optimizations to turn conditional branches into unconditional. This commit adds a simple control-flow optimization which merges two consecutive basic blocks which are connected by a single edge. This allows the codegen to operate on larger basic blocks. rdar://11973998 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161852 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename test since it's not linux-specific.Bill Wendling2012-08-131-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161792 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-131-0/+30
| | | | | | | | It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161781 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix failure on Atom bot due to r161769Manman Ren2012-08-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161777 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr fromManman Ren2012-08-131-0/+14
| | | | | | | | | | OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed to a memory operand. PR13576 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161769 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR13577, an issue introduced by r161687Michael Liao2012-08-111-0/+8
| | | | | | | | | | - FCMOV only supports a subset of X86 conditions. Skip boolean simplification if X86 condition is not valid for FCMOV. - add a minimal test case for PR13577. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161732 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13578: Teach MachineCSE that instructions that use a constant register can ↵Benjamin Kramer2012-08-112-2/+24
| | | | | | | | be CSE'd safely. This is common e.g. when doing rip-relative addressing on x86_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161728 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: when we are auto-detecting the subtarget features, make sure we turn onManman Ren2012-08-101-1/+3
| | | | | | | | | | | | FeatureFastUAMem for Nehalem, Westmere and Sandy Bridge. FeatureFastUAMem is already on if we pass in nehalem or westmere as a command argument. rdar: 7252306 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161717 91177308-0d34-0410-b5e6-96231b3b80d8
* add X86-specific DAG optimization to simplify boolean testMichael Liao2012-08-101-0/+42
| | | | | | | | | | | | | | | - if a boolean test (X86ISD::CMP or X86ISD:SUB) checks a boolean value generated from X86ISD::SETCC, try to simplify the boolean value generation and checking by reusing the original EFLAGS with proper condition code - add hooks to X86 specific SETCC/BRCOND/CMOV, the major 3 places consuming EFLAGS part of patches fixing PR12312 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161687 91177308-0d34-0410-b5e6-96231b3b80d8
* Update edge weights correctly in replaceSuccessor().Jakob Stoklund Olesen2012-08-101-1/+1
| | | | | | | | When replacing Old with New, it can happen that New is already a successor. Add the old and new edge weights instead of creating a duplicate edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161653 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-101-1/+1
| | | | | | | No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-091-1/+1
| | | | | | These commits broke a number of buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-092-3/+3
| | | | | | | | | | | | | | | | This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-091-2/+2
| | | | | | | | | | | Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test triples to fix win32 failures. Revert workaround from r161292.Bob Wilson2012-08-084-8/+8
| | | | | | I don't have a win32 system to test, so hopefully I got them all fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161519 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-0/+23
| | | | | | | | | | | | | | | We perform the following: 1> Use SUB instead of CMP for i8,i16,i32 and i64 in ISel lowering. 2> Modify MachineCSE to correctly handle implicit defs. 3> Convert SUB back to CMP if possible at peephole. Removed pattern matching of (a>b) ? (a-b):0 and like, since they are handled by peephole now. rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161462 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 cmp lowering is looking past truncate on the condition node. It should onlyEvan Cheng2012-08-071-0/+36
| | | | | | | | | do so when the high bits are known zero. This caused a subtle miscompilation. rdar://12027825 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161451 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a much more conservative strategy for aligning branch targets.Chandler Carruth2012-08-073-5/+10
| | | | | | | | | | | | | Previously, MBP essentially aligned every branch target it could. This bloats code quite a bit, especially non-looping code which has no real reason to prefer aligned branch targets so heavily. As Andy said in review, it's still a bit odd to do this without a real cost model, but this at least has much more plausible heuristics. Fixes PR13265. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161409 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren2012-08-072-1/+36
| | | | | | | | | | If the result of a common subexpression is used at all uses of the candidate expression, CSE should not increase the live range of the common subexpression. rdar://11393714 and rdar://11819721 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161396 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires ↵Craig Topper2012-08-061-10/+10
| | | | | | custom handling in DAGISelToDAG due to limitations in TableGen's implicit def handling. Fixes PR11305. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161318 91177308-0d34-0410-b5e6-96231b3b80d8
* Update test to check for r161305Craig Topper2012-08-051-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161307 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor and check "onlyReadsMemory" before optimizing builtins.Bob Wilson2012-08-032-4/+4
| | | | | | | | | This patch is mostly just refactoring a bunch of copy-and-pasted code, but it also adds a check that the call instructions are readnone or readonly. That check was already present for sin, cos, sqrt, log2, and exp2 calls, but it was missing for the rest of the builtins being handled in this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161282 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix memcmp code-gen to honor -fno-builtin.Bob Wilson2012-08-031-0/+3
| | | | | | | | | I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp in TargetLibraryInfo, so that it would use custom code for memcmp calls even with -fno-builtin. I also had to add a new -disable-simplify-libcalls option to llc so that I could write a test for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161262 91177308-0d34-0410-b5e6-96231b3b80d8
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-0/+8
| | | | | | | | | | Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-022-22/+42
| | | | | | | | | | | Add more comments and use early returns to reduce nesting in isLoadFoldable. Also disable folding for V_SET0 to avoid introducing a const pool entry and a const pool load. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161207 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Make sure this is testing without +avx.NAKAMURA Takumi2012-08-021-1/+1
| | | | | | FIXME: Could +avx be checked here too? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161156 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll: Rewrite expressions to pass ↵NAKAMURA Takumi2012-08-021-4/+6
| | | | | | | | | regardless of PR11031. - Relax to match even if epilogue (pop %ebp) were emitted. - Assume the return value is stored to %xmm0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161155 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-026-54/+61
| | | | | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. This patch is a rework of r160919 and was tested on clang self-host on my local machine. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161152 91177308-0d34-0410-b5e6-96231b3b80d8
* Line endings.Matt Beaumont-Gay2012-08-011-139/+139
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161117 91177308-0d34-0410-b5e6-96231b3b80d8
* Added FMA functionality to X86 target.Elena Demikhovsky2012-08-013-22/+165
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier2012-07-311-2/+2
| | | | | | | Previously, we were using EBX, but PIC requires the GOT to be in EBX before function calls via PLT GOT pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161066 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineSink: Sort the successors before trying to find SuccToSinkTo.Manman Ren2012-07-311-0/+54
| | | | | | | | | | | One motivating example is to sink an instruction from a basic block which has two successors: one outside the loop, the other inside the loop. We should try to sink the instruction outside the loop. rdar://11980766 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161062 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse order of the two branches at end of a basic block if it is profitable.Manman Ren2012-07-311-0/+104
| | | | | | | | | | | | | | | | We branch to the successor with higher edge weight first. Convert from je LBB4_8 --> to outer loop jmp LBB4_14 --> to inner loop to jne LBB4_14 jmp LBB4_8 PR12750 rdar: 11393714 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161018 91177308-0d34-0410-b5e6-96231b3b80d8
* Consider address spaces for hashing and CSEing DAG nodes. Otherwise two ↵Pete Cooper2012-07-301-0/+16
| | | | | | loads from different x86 segments but the same address would get CSEd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-296-61/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160927 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-282-4/+4
| | | | | | | Trying to fix the bot by specifying a triple in the failing testing cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160920 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-286-50/+57
| | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. rdar://10554090 and rdar://11873276 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160919 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 Peephole: fix PR13475 in optimizeCompare.Manman Ren2012-07-281-0/+16
| | | | | | | | | | It is possible that an instruction can use and update EFLAGS. When checking the safety, we should check the usage of EFLAGS first before declaring it is safe to optimize due to the update. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160912 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach CodeGenPrep to look past bitcast when it's duplicating return instructionEvan Cheng2012-07-271-0/+87
| | | | | | | | | into predecessor blocks to enable tail call optimization. rdar://11958338 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160894 91177308-0d34-0410-b5e6-96231b3b80d8
* Add <imp-def> of super-register when lowering SUBREG_TO_REG.Jakob Stoklund Olesen2012-07-271-1/+1
| | | | | | Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160888 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate a batch of uses of sub_ss and sub_sd in the X86 target.Jakob Stoklund Olesen2012-07-261-1/+1
| | | | | | | | | | | | | | These idempotent sub-register indices don't do anything --- They simply map XMM registers to themselves. They no longer affect register classes either since the SubRegClasses field has been removed from Target.td. This patch replaces XMM->XMM EXTRACT_SUBREG and INSERT_SUBREG patterns with COPY_TO_REGCLASS patterns which simply become COPY instructions. The number of IMPLICIT_DEF instructions before register allocation is reduced, and that is the cause of the test case changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160816 91177308-0d34-0410-b5e6-96231b3b80d8
* Update testing case for Atom when disabling rematerialization inManman Ren2012-07-251-1/+97
| | | | | | | | | | TwoAddressInstructionPass. The generated code for Atom has a different code sequence. This is realted to commit r160749. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160755 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable rematerialization in TwoAddressInstructionPass.Manman Ren2012-07-253-5/+6
| | | | | | | | | | | | It is redundant; RegisterCoalescer will do the remat if it can't eliminate the copy. Collected instruction counts before and after this. A few extra instructions are generated due to spilling but it is normal to see these kinds of changes with almost any small codegen change, according to Jakob. This also fixed rdar://11830760 where xor is expected instead of movi0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160749 91177308-0d34-0410-b5e6-96231b3b80d8
* When a return struct pointer is passed in registers, the called has nothingRafael Espindola2012-07-251-13/+40
| | | | | | to pop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160725 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a cpu to the test. Should fix the atom bot.Rafael Espindola2012-07-241-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160701 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a triple to the test.Rafael Espindola2012-07-241-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160698 91177308-0d34-0410-b5e6-96231b3b80d8
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