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* Fix a typo (the the => the)Sylvestre Ledru2012-07-231-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160621 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed DAGCombine optimizations which generate select_cc for targetsNadav Rotem2012-07-231-0/+19
| | | | | | | | | | | | that do not support it (X86 does not lower select_cc). PR: 13428 Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160619 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid folding loads that are unsafe to move.Jakob Stoklund Olesen2012-07-201-0/+143
| | | | | | | | | | LiveRangeEdit::foldAsLoad() can eliminate a register by folding a load into its only use. Only do that when the load is safe to move, and it won't extend any live ranges. This fixes PR13414. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160575 91177308-0d34-0410-b5e6-96231b3b80d8
* Split loop exiting edges more aggressively.Jakob Stoklund Olesen2012-07-201-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PHIElimination splits critical edges when it predicts it can resolve interference and eliminate copies. It doesn't split the edge if the interference wouldn't be resolved anyway because the phi-use register is live in the critical edge anyway. Teach PHIElimination to split loop exiting edges with interference, even if it wouldn't resolve the interference. This removes the necessary copies from the loop, which is still an improvement from injecting the copies into the loop. The test case demonstrates the improvement. Before: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx movl %esi, %eax je LBB0_1 After: LBB0_1: cmpb $0, (%rdx) leaq 1(%rdx), %rdx je LBB0_1 movl %esi, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160571 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix remaining lit tests which were failing when run on an AtomPreston Gurd2012-07-1912-16/+51
| | | | | | | | | | processor. Patches by Tyler Nowicki, Andy Zhang, and Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160520 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: remove redundant cmp against zero.Manman Ren2012-07-181-0/+11
| | | | | | | | | | Updated OptimizeCompare in peephole to remove redundant cmp against zero. We only remove Compare if CF and OF are not used. rdar://11855129 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160454 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes 8 out of 20 unexpected failures in "make check"Preston Gurd2012-07-189-33/+69
| | | | | | | | | | | | | | | | | when run on an Intel Atom processor. The failures have arisen due to changes elsewhere in the trunk over the past 8 weeks or so. These failures were not detected by the Atom buildbot because the CPU on the Atom buildbot was not being detected as an Atom CPU. The fix for this problem is in Host.cpp and X86Subtarget.cpp, but shall remain commented out until the current set of Atom test failures are fixed. Patch by Andy Zhang and Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160451 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for r160387Evan Cheng2012-07-171-2/+44
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160389 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in the legalization of large vectors.Nadav Rotem2012-07-171-0/+16
| | | | | | | | | When truncating a result of a vector that is split we need to use the result of the split vector, and not re-split the dead node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160357 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement r160312 as target indepedenet dag combine.Evan Cheng2012-07-171-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160354 91177308-0d34-0410-b5e6-96231b3b80d8
* This is another case where instcombine demanded bits optimization createdEvan Cheng2012-07-171-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | large immediates. Add dag combine logic to recover in case the large immediates doesn't fit in cmp immediate operand field. int foo(unsigned long l) { return (l>> 47) == 1; } we produce %shr.mask = and i64 %l, -140737488355328 %cmp = icmp eq i64 %shr.mask, 140737488355328 %conv = zext i1 %cmp to i32 ret i32 %conv which codegens to movq $0xffff800000000000,%rax andq %rdi,%rax movq $0x0000800000000000,%rcx cmpq %rcx,%rax sete %al movzbl %al,%eax ret TargetLowering::SimplifySetCC would transform (X & -256) == 256 -> (X >> 8) == 1 if the immediate fails the isLegalICmpImmediate() test. For x86, that's immediates which are not a signed 32-bit immediate. Based on a patch by Eli Friedman. PR10328 rdar://9758774 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
* For something likeEvan Cheng2012-07-162-2/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | uint32_t hi(uint64_t res) { uint_32t hi = res >> 32; return !hi; } llvm IR looks like this: define i32 @hi(i64 %res) nounwind uwtable ssp { entry: %lnot = icmp ult i64 %res, 4294967296 %lnot.ext = zext i1 %lnot to i32 ret i32 %lnot.ext } The optimizer has optimize away the right shift and truncate but the resulting constant is too large to fit in the 32-bit immediate field. The resulting x86 code is worse as a result: movabsq $4294967296, %rax ## imm = 0x100000000 cmpq %rax, %rdi sbbl %eax, %eax andl $1, %eax This patch teaches the x86 lowering code to handle ult against a large immediate with trailing zeros. It will issue a right shift and a truncate followed by a comparison against a shifted immediate. shrq $32, %rdi testl %edi, %edi sete %al movzbl %al, %eax It also handles a ugt comparison against a large immediate with trailing bits set. i.e. X > 0x0ffffffff -> (X >> 32) >= 1 rdar://11866926 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160312 91177308-0d34-0410-b5e6-96231b3b80d8
* Make ComputeDemandedBits return a deterministic result when computing an ↵Nadav Rotem2012-07-161-0/+12
| | | | | | | | | | | | | AssertZext value. In the added testcase the constant 55 was behind an AssertZext of type i1, and ComputeDemandedBits reported that some of the bits were both known to be one and known to be zero. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160305 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix tests that failed on i686-win32 after r160248:Alexey Samsonov2012-07-162-3/+4
| | | | | | | | | 1. FileCheck-ize epilogue.ll and allow another asm instruction to restore %rsp. 2. Remove check in widen_arith-3.ll that was hitting instruction in epilogue instead of vector add. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160274 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the 3-address conversion of LEA when one of the operands is anNadav Rotem2012-07-161-0/+16
| | | | | | | | | | | | | | undef virtual register. The problem is that ProcessImplicitDefs removes the definition of the register and marks all uses as undef. If we lose the undef marker then we get a register which has no def, is not marked as undef. The live interval analysis does not collect information for these virtual registers and we crash in later passes. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160260 91177308-0d34-0410-b5e6-96231b3b80d8
* This CL changes the function prologue and epilogue emitted on X86 when stack ↵Alexey Samsonov2012-07-163-24/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | needs realignment. It is intended to fix PR11468. Old prologue and epilogue looked like this: push %rbp mov %rsp, %rbp and $alignment, %rsp push %r14 push %r15 ... pop %r15 pop %r14 mov %rbp, %rsp pop %rbp The problem was to reference the locations of callee-saved registers in exception handling: locations of callee-saved had to be re-calculated regarding the stack alignment operation. It would take some effort to implement this in LLVM, as currently MachineLocation can only have the form "Register + Offset". Funciton prologue and epilogue are now changed to: push %rbp mov %rsp, %rbp push %14 push %15 and $alignment, %rsp ... lea -$size_of_saved_registers(%rbp), %rsp pop %r15 pop %r14 pop %rbp Reviewed by Chad Rosier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160248 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach getTargetVShiftNode about TargetConstant nodes.Nadav Rotem2012-07-151-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160234 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll: Rewrite expressions to ↵NAKAMURA Takumi2012-07-151-1/+3
| | | | | | | | | fit various targets. - Make sure existence of "barrier". - Confirm reload corresponding to spill. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160232 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename VBROADCASTSDrm into VBROADCASTSDYrm to match the naming convention.Nadav Rotem2012-07-151-0/+21
| | | | | | | | | | | Allow the folding of vbroadcastRR to vbroadcastRM, where the memory operand is a spill slot. PR12782. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160230 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX: Fix a bug in getTargetVShiftNode. The shift amount has to be a 128bit ↵Nadav Rotem2012-07-141-0/+31
| | | | | | | | | | vector with the same element type as the input vector. This is needed because of the patterns we have for the VP[SLL/SRA/SRL][W/D/Q] instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160222 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a dagcombine optimization to convert concat_vectors of undefs into a ↵Nadav Rotem2012-07-141-0/+17
| | | | | | | | | | single undef. The unoptimized concat_vectors isd prevented the canonicalization of the vector_shuffle node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160221 91177308-0d34-0410-b5e6-96231b3b80d8
* Restrict this to x86, hopefully fixing ARM buildbots.Duncan Sands2012-07-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160163 91177308-0d34-0410-b5e6-96231b3b80d8
* Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ↵Benjamin Kramer2012-07-121-0/+38
| | | | | | | | MachineLICM don't touch it. I already had the necessary things in place for IR-level passes but missed the machine passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160137 91177308-0d34-0410-b5e6-96231b3b80d8
* The LIT tests below do not specify the exact cpu model and fail on AVX2 ↵Nadav Rotem2012-07-125-9/+9
| | | | | | | | | | machines, because we select different instructions such as vbroadcast, new shuffles, etc. Patch by Michael Liao. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160129 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/rdrand.ll: Relax expression corresponding to Win64 CC.NAKAMURA Takumi2012-07-121-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160124 91177308-0d34-0410-b5e6-96231b3b80d8
* Use %s instead of the explicit name, the latter doesn't work in out-of-tree ↵Benjamin Kramer2012-07-121-1/+1
| | | | | | builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160120 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer2012-07-121-0/+47
| | | | | | | | | The rdrand/cmov sequence is the same that is emitted by both GCC and ICC. Fixes PR13284. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160117 91177308-0d34-0410-b5e6-96231b3b80d8
* The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type ofDuncan Sands2012-07-121-0/+20
| | | | | | | | | | the input vector, it can be bigger (this is helpful for powerpc where <2 x i16> is a legal vector type but i16 isn't a legal type, IIRC). However this wasn't being taken into account by ExpandRes_EXTRACT_VECTOR_ELT, causing PR13220. Lightly tweaked version of a patch by Michael Liao. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160116 91177308-0d34-0410-b5e6-96231b3b80d8
* Update GATHER instructions to support 2 read-write operands. Patch from ↵Craig Topper2012-07-121-0/+19
| | | | | | myself and Manman Ren. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160110 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) pair.Manman Ren2012-07-111-0/+12
| | | | | | | | When Movr0 is between sub and cmp, we move Movr0 before sub if it enables removal of Cmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160066 91177308-0d34-0410-b5e6-96231b3b80d8
* PR13326: Fix a subtle edge case in the udiv -> magic multiply generator.Benjamin Kramer2012-07-111-0/+21
| | | | | | This caused 6 of 65k possible 8 bit udivs to be wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160058 91177308-0d34-0410-b5e6-96231b3b80d8
* When ext-loading and trunc-storing vectors to memory, on x86 32bit systems, ↵Nadav Rotem2012-07-115-9/+26
| | | | | | allow loads/stores of 64bit values from xmm registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160044 91177308-0d34-0410-b5e6-96231b3b80d8
* Add newline.Chad Rosier2012-07-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160006 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case accidentally omitted from r160002.Chad Rosier2012-07-101-0/+242
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160004 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-103-5/+18
| | | | | | | | | | | | | | X86. Basically, this is a reapplication of r158087 with a few fixes. Specifically, (1) the stack pointer is restored from the base pointer before popping callee-saved registers and (2) in obscure cases (see comments in patch) we must cache the value of the original stack adjustment in the prologue and apply it in the epilogue. rdar://11496434 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160002 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve the loading of load-anyext vectors by allowing the codegen to loadNadav Rotem2012-07-103-12/+18
| | | | | | | | | | | multiple scalars and insert them into a vector. Next, we shuffle the elements into the correct places, as before. Also fix a small dagcombine bug in SimplifyBinOpWithSameOpcodeHands, when the migration of bitcasts happened too late in the SelectionDAG process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159991 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: implement functions to analyze & synthesize CMOV|SET|JccManman Ren2012-07-091-0/+17
| | | | | | | | | | | | getCondFromSETOpc, getCondFromCMovOpc, getSETFromCond, getCMovFromCond No functional change intended. If we want to update the condition code of CMOV|SET|Jcc, we first analyze the opcode to get the condition code, then update the condition code, finally synthesize the new opcode form the new condition code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159955 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-071-0/+18
| | | | | | | | | It is safe if EFLAGS is killed or re-defined. When we are done with the basic block, check whether EFLAGS is live-out. Do not optimize away cmp if EFLAGS is live-out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159888 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: peephole optimization to remove cmp instructionManman Ren2012-07-061-0/+19
| | | | | | | | | | For each Cmp, we check whether there is an earlier Sub which make Cmp redundant. We handle the case where SUB operates on the same source operands as Cmp, including the case where the two source operands are swapped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159838 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic.Chad Rosier2012-07-061-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159837 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to fix windows buildbots. Patch by James Benton.Duncan Sands2012-07-061-5/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159826 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/sext-setcc-self.ll: Mark it as XFAIL: cygwin,mingw32,win32. ↵NAKAMURA Takumi2012-07-061-0/+4
| | | | | | Investigating. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159820 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1Duncan Sands2012-07-051-0/+55
| | | | | | | booleans. Patch by James Benton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159739 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensure CopyToReg nodes are always glued to the call instruction.Jakob Stoklund Olesen2012-07-042-5/+21
| | | | | | | | | | | | | The CopyToReg nodes that set up the argument registers before a call must be glued to the call instruction. Otherwise, the scheduler may emit the physreg copies long before the call, causing long live ranges for the fixed registers. Besides disabling good register allocation, that can also expose problems when EmitInstrWithCustomInserter() splits a basic block during the live range of a physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159721 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase for pr13209. It is not a great test, but it still fails ifRafael Espindola2012-07-041-0/+74
| | | | | | | 159509 and 159479 are reverted. It would be really nice to be able to run just the coalescer :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159715 91177308-0d34-0410-b5e6-96231b3b80d8
* Add early if-conversion support to X86.Jakob Stoklund Olesen2012-07-041-0/+39
| | | | | | | | | Implement the TII hooks needed by EarlyIfConversion to create cmov instructions and estimate their latency. Early if-conversion is still not enabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159695 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/sincos.ll: FileCheck-ize.NAKAMURA Takumi2012-07-031-4/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159639 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/fabs.ll: FileCheck-ize.NAKAMURA Takumi2012-07-031-5/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159638 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/2007-09-05-InvalidAsm.ll: FileCheck-ize.NAKAMURA Takumi2012-07-031-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159637 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/2004-03-30-Select-Max.ll: FileCheck-ize.NAKAMURA Takumi2012-07-031-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159636 91177308-0d34-0410-b5e6-96231b3b80d8
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