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* Start function numbering at 0.Dan Gohman2010-04-171-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
* Split big test into multiple directories to cater toDale Johannesen2010-04-071-0/+33
| | | | | | | | those who don't build all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
* fix AsmPrinter::GetBlockAddressSymbol to always return a uniqueChris Lattner2010-03-141-1/+1
| | | | | | | | label instead of trying to form one based on the BB name (which causes collisions if the name is empty). This fixes PR6608 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
* Add dag combine to simplify lmul(x, 0, a, b)Richard Osborne2010-03-111-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98258 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle MVT::i64 type in DAG combine for ISD::ADD. Fold 64 bitRichard Osborne2010-03-101-0/+15
| | | | | | | | expression add(add(mul(x,y),a),b) -> lmul(x,y,a,b) if all operands are zero extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98168 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold add(add(mul(x,y),a),b) -> lmul(x,y,a,b) if the intermediateRichard Osborne2010-03-101-0/+12
| | | | | | | results are unused elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98157 91177308-0d34-0410-b5e6-96231b3b80d8
* Prefer LMUL to MACCU as LMUL has no tied operands.Richard Osborne2010-03-101-4/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98153 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom lower (S|U)MUL_LOHI -> MACC(S|U)Richard Osborne2010-03-101-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98152 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower add (mul a, b), c into MACCU / MACCS nodes which translateRichard Osborne2010-03-101-0/+24
| | | | | | | | | directly to the maccu / maccs instructions. We handle this in ExpandADDSUB since after type legalisation it is messy to recognise these operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98150 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert test to FileCheck.Richard Osborne2010-03-101-3/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98148 91177308-0d34-0410-b5e6-96231b3b80d8
* In cases where the carry / borrow unused converted ladd / lsubRichard Osborne2010-03-091-0/+39
| | | | | | | to an add or a sub. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98059 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DAG combine for ladd / lsub.Richard Osborne2010-03-091-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98057 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.Richard Osborne2010-02-261-0/+26
| | | | | | | | Previously LoopStrengthReduce would sometimes be unable to find a legal formula, causing an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97226 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower BR_JT on the XCore to a jump into a series of jump instructions.Richard Osborne2010-02-232-0/+156
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96942 91177308-0d34-0410-b5e6-96231b3b80d8
* convert the last 3 targets to use EmitFunctionBody() now thatChris Lattner2010-01-281-1/+1
| | | | | | | | | | | | | | it has before/end body hooks. lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++----------- lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------ lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------ test/CodeGen/XCore/ashr.ll | 2 4 files changed, 48 insertions(+), 146 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94741 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete useless trailing semicolons.Dan Gohman2010-01-052-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore support for indirectbr / blockaddress.Richard Osborne2009-11-181-0/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89273 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore support for arbitrary-sized aggregate returns.Richard Osborne2009-11-141-0/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88802 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some peepholes for signed comparisons using ashr X, X, 32.Richard Osborne2009-10-081-0/+76
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83549 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-0931-31/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for mergeable sections back into the XCore backend.Richard Osborne2009-08-182-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8
* Put data with relocations in the same sections as data without relocations.Richard Osborne2009-08-181-0/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8
* Update getSectionForConstant() to to allow mergable sections to be nulled outRichard Osborne2009-08-171-0/+11
| | | | | | | if not supported by the ELF subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79249 91177308-0d34-0410-b5e6-96231b3b80d8
* use XCore-specific section with xcore specific cp/dp flags to restore Chris Lattner2009-08-152-2/+0
| | | | | | | | | support for globals going into the appropriate sections with the flags. This hopefully finishes unbreaking the previous behavior that I broke before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79079 91177308-0d34-0410-b5e6-96231b3b80d8
* Add extra SEXT pattern.Richard Osborne2009-08-021-0/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77920 91177308-0d34-0410-b5e6-96231b3b80d8
* switch off of 'Section' onto MCSection. We're not properly usingChris Lattner2009-07-311-2/+1
| | | | | | | | MCSection subclasses yet, but this is a step in the right direction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8
* Add tests for handling of globals and tls on the XCore. These currently failRichard Osborne2009-07-242-0/+58
| | | | | | | but pass when run against r76652. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76923 91177308-0d34-0410-b5e6-96231b3b80d8
* Combine an unaligned store of unaligned load into a memmove.Richard Osborne2009-07-161-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand unaligned 32 bit loads from an address which is a constantRichard Osborne2009-07-162-0/+31
| | | | | | | | | | | | | | | | offset from a 32 bit aligned base as follows: ldw low, base[offset >> 2] ldw high, base[(offset >> 2) + 1] shr low_shifted, low, (offset & 0x3) * 8 shl high_shifted, high, 32 - (offset & 0x3) * 8 or result, low_shifted, high_shifted Expand 32 bit loads / stores with 16 bit alignment into two 16 bit loads / stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom lower unaligned 32 bit stores and loads into libcalls. This is Richard Osborne2009-07-162-0/+18
| | | | | | | | a big code size win since before they were expanding to upto 16 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pattern for LD16S_3r, add basic tests to check load / store instructionsRichard Osborne2009-07-152-0/+74
| | | | | | | are being properly selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75797 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.Richard Osborne2009-07-151-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75788 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the Add, Sub, and Mul instruction opcodes into separateDan Gohman2009-06-042-7/+7
| | | | | | | | | | | | | | | | integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for PR4235: to build a floating-point value from integer parts, Eli Friedman2009-05-201-1/+1
| | | | | | | | | | | | | | build an integer and cast that to a float. This fixes a crash caused by trying to split an f32 into two f16's. This changes the behavior in test/CodeGen/XCore/fneg.ll because that testcase now triggers a DAGCombine which converts the fneg into an integer operation. If someone is interested, it's probably possible to tweak the test to generate an actual fneg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72162 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for PR3898Chris Lattner2009-04-181-0/+6
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* Add the private linkage.Rafael Espindola2009-01-151-0/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't fold address calculations which use negative offsets intoRichard Osborne2009-01-151-0/+12
| | | | | | | the ADDRspii addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62258 91177308-0d34-0410-b5e6-96231b3b80d8
* Add pseudo instructions to the XCore for (load|store|load address) of aRichard Osborne2009-01-141-0/+18
| | | | | | | | | | | | frame index. eliminateFrameIndex will replace these instructions with (LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use. This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame pointer elimination. However since they were marked as implicitly using SP they could not be rematerialised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62238 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ISD::TRAP to the XCore backendRichard Osborne2008-12-031-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60479 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r59464, this time using the correct typeDuncan Sands2008-11-189-9/+0
| | | | | | | when softening FNEG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59513 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r59464. It was causing this failure:Bill Wendling2008-11-189-0/+9
| | | | | | | | | | | | | | | | | | | | Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ... FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll Failed with signal(SIGABRT) at line 1 while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913. 0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844 1 libSystem.B.dylib 0x9217809b _sigtramp + 43 2 ??? 0xffffffff 0x0 + 4294967295 3 libSystem.B.dylib 0x921f0ec2 raise + 26 4 libSystem.B.dylib 0x9220047f abort + 73 5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101 6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1 make: *** [check] Error 2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59487 91177308-0d34-0410-b5e6-96231b3b80d8
* Add soft float support for a bunch more operations. OriginalDuncan Sands2008-11-1711-0/+168
| | | | | | | | patch by Richard Osborne, tweaked and extended by your humble servant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't produce ADDC/ADDE when expanding SHL unless they are legalRichard Osborne2008-11-171-0/+6
| | | | | | | for the target. This fixes PR3080. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Fix expansion of 64 bit add/sub. Don't custom expandRichard Osborne2008-11-141-0/+12
| | | | | | | | these operations if ladd/lsub are not available on the current subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59305 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsics for getid (returns thread id) and bitrev (reversesRichard Osborne2008-11-142-0/+16
| | | | | | | bits in a word). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59296 91177308-0d34-0410-b5e6-96231b3b80d8
* Add basic test for XCore backendRichard Osborne2008-11-072-0/+11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58841 91177308-0d34-0410-b5e6-96231b3b80d8
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