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* Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to ...Craig Topper2011-12-301-0/+24
* Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size,...Craig Topper2011-12-301-0/+28
* Cleanup stack/frame register define/kill states. This fixes two bugs:Hal Finkel2011-12-302-8/+14
* Fix type-checking for load transformation which is not legal on floating-poin...Eli Friedman2011-12-281-0/+14
* PR11662.Nadav Rotem2011-12-281-0/+20
* Fixed a bug in LowerVECTOR_SHUFFLE and LowerBUILD_VECTOR.Elena Demikhovsky2011-12-281-1/+15
* Make sure DAGCombiner doesn't introduce multiple loads from the same memory l...Eli Friedman2011-12-262-5/+21
* Use standard promotion for i8 CTTZ nodes and i8 CTLZ nodes when theChandler Carruth2011-12-243-5/+5
* Add systematic testing for cttz as well, and fix the bug I spotted byChandler Carruth2011-12-241-0/+30
* Add i8 and i64 testing for ctlz on x86. Also simplify the i16 test.Chandler Carruth2011-12-241-4/+26
* Tidy up this rather crufty test. Put the declarations at the top to makeChandler Carruth2011-12-241-33/+32
* Expand more when we have a nice 'tzcnt' instruction, to avoid generatingChandler Carruth2011-12-241-0/+28
* Tidy up some of these tests.Chandler Carruth2011-12-241-22/+19
* Switch the lowering of CTLZ_ZERO_UNDEF from a .td pattern back to theChandler Carruth2011-12-242-1/+54
* Cleanup this test a bit, sorting things and grouping them more clearly.Chandler Carruth2011-12-241-21/+17
* Test case for r147232.Akira Hatanaka2011-12-241-0/+12
* Experimental support for aligned NEON spills.Jakob Stoklund Olesen2011-12-231-0/+73
* Fix a couple of copy-n-paste bugs. Noticed by George Russell!Chad Rosier2011-12-211-0/+58
* Fix a couple of copy-n-paste bugs. Noticed by George Russell.Evan Cheng2011-12-211-4/+26
* Fix bug in zero-store peephole pattern reported in pr11615.Akira Hatanaka2011-12-211-0/+19
* Expand 64-bit CTLZ nodes if target architecture does not support it. Add testAkira Hatanaka2011-12-211-0/+19
* Test case for r147017.Akira Hatanaka2011-12-201-0/+25
* Add function MipsDAGToDAGISel::SelectMULT and factor out code that generatesAkira Hatanaka2011-12-201-0/+8
* 64-bit data directive.Akira Hatanaka2011-12-201-0/+11
* 32-to-64-bit sext_inreg pattern.Akira Hatanaka2011-12-201-0/+8
* Add code in MipsDAGToDAGISel for selecting constant +0.0.Akira Hatanaka2011-12-201-0/+7
* Heed spill slot alignment on ARM.Jakob Stoklund Olesen2011-12-202-2/+23
* ARM target code clean up. Check for iOS, not Darwin where it makes sense.Evan Cheng2011-12-2018-31/+31
* This is the second fix related to VZEXT_MOVL node.Elena Demikhovsky2011-12-201-0/+9
* Begin teaching the X86 target how to efficiently codegen patterns thatChandler Carruth2011-12-201-15/+32
* Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.Bob Wilson2011-12-201-0/+55
* Move tests to FileCheck.Evan Cheng2011-12-192-3/+10
* Add a test case for r146900.Akira Hatanaka2011-12-191-0/+38
* Add patterns for matching immediates whose lower 16-bit is cleared. TheseAkira Hatanaka2011-12-192-6/+11
* Remove definitions of double word shift plus 32 instructions. Assembler orAkira Hatanaka2011-12-192-6/+6
* Remove the restriction on the first operand of the add node in SelectAddr.Akira Hatanaka2011-12-191-1/+1
* Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle.Evan Cheng2011-12-171-0/+28
* Make sure that the lower bits on the VSELECT condition are properly set.Lang Hames2011-12-171-4/+11
* Fix off-by-one error in bucket sort.Jakob Stoklund Olesen2011-12-161-0/+26
* Hexagon: Fix a nasty order-of-initialization bug.Benjamin Kramer2011-12-1610-20/+10
* Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is su...Craig Topper2011-12-162-0/+65
* Add missing zmovl AVX patterns which were causing crashes.Chad Rosier2011-12-151-0/+8
* Fix assert in LowerBUILD_VECTOR for v16i16 type on AVX.Chad Rosier2011-12-151-0/+8
* Set specific target cpu for testcase.Lang Hames2011-12-151-1/+1
* Added test case for r146671.Lang Hames2011-12-151-0/+12
* Add a test case to make sure that the nop really does follow the bl on ppc64 elfHal Finkel2011-12-151-0/+16
* Don't try to form FGETSIGN after legalization; it is possible in some cases, ...Eli Friedman2011-12-151-0/+16
* Add support for lowering fneg when AVX is enabled.Chad Rosier2011-12-151-0/+8
* Do not sink instruction, if it is not profitable.Devang Patel2011-12-141-0/+48
* Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct objectAkira Hatanaka2011-12-141-0/+19
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