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* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-2190-1460/+1482
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47432 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for PR1133Chris Lattner2008-02-211-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47427 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a (harmless) but where vregs were added to the used reg lists for Chris Lattner2008-02-211-0/+15
| | | | | | | | | | | | inline asms. Fix PR2078 by marking aliases of registers used when a register is marked used. This prevents EAX from being allocated when AX is listed in the clobber set for the asm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
* XFAIL this for now.Evan Cheng2008-02-201-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47355 91177308-0d34-0410-b5e6-96231b3b80d8
* this test requires sse2Chris Lattner2008-02-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47331 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't fold and's into test instructions if they have multiple uses.Chris Lattner2008-02-191-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | This compiles test-nofold.ll into: _test: movl $15, %ecx andl 4(%esp), %ecx testl %ecx, %ecx movl $42, %eax cmove %ecx, %eax ret instead of: _test: movl 4(%esp), %eax movl %eax, %ecx andl $15, %ecx testl $15, %eax movl $42, %eax cmove %ecx, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47330 91177308-0d34-0410-b5e6-96231b3b80d8
* rename tests to avoid a test- prefix when they aren't related to the test ↵Chris Lattner2008-02-1910-0/+0
| | | | | | instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47329 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-1951-1306/+1302
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47325 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't spew stats to stderr.Nick Lewycky2008-02-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47308 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up the run line for this new test.Nick Lewycky2008-02-191-1/+1
| | | | | | | llc: for the -info-output-file option: requires a value! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47306 91177308-0d34-0410-b5e6-96231b3b80d8
* New test.Evan Cheng2008-02-191-0/+219
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47302 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-19162-3373/+3173
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47296 91177308-0d34-0410-b5e6-96231b3b80d8
* - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should ↵Evan Cheng2008-02-181-0/+17
| | | | | | | | | check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. - X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't mark scalar integer multiplication as Expand on x86, since x86Dan Gohman2008-02-181-0/+8
| | | | | | | | | | | | | | has plain one-result scalar integer multiplication instructions. This avoids expanding such instructions into MUL_LOHI sequences that must be special-cased at isel time, and avoids the problem with that code that provented memory operands from being folded. This fixes PR1874, addressesing the most common case. The uncommon cases of optimizing multiply-high operations will require work in DAGCombiner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove llvm-upgrade.Tanya Lattner2008-02-1750-906/+906
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47238 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm.memory.barrier, and impl for x86 and alphaAndrew Lenharth2008-02-166-0/+79
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* This test is not interesting.Evan Cheng2008-02-151-21/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47189 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a miscompilation from Dan's recent apintification.Chris Lattner2008-02-141-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
* This readme entry is done, testcase here: CodeGen/X86/zero-remat.llChris Lattner2008-02-141-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test.Evan Cheng2008-02-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47102 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach LegalizeTypes how to expand and promote CTLZ,Duncan Sands2008-02-131-12/+11
| | | | | | | | | | | | | | | | | | | CTTZ and CTPOP. The expansion code differs from that in LegalizeDAG in that it chooses to take the CTLZ/CTTZ count from the Hi/Lo part depending on whether the Hi/Lo value is zero, not on whether CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the width of the type is) for it. I made this change because the optimizers may well know that Hi/Lo is zero and exploit it. The promotion code for CTTZ also differs from that in LegalizeDAG: it uses an "or" to get the right result when the original value is zero, rather than using a compare and select. This also means the value doesn't need to be zero extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8
* In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower thisChris Lattner2008-02-131-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | node as soon as we create it in SDISel. Previously we would lower it in legalize. The problem with this is that it only exposes the argument loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2 can hack on them. This causes us to miss some optimizations because datatype expansion also happens here. Exposing the loads early allows us to do optimizations on them. For example we now compile arg-cast.ll to: _foo: movl $2147483647, %eax andl 8(%esp), %eax ret where we previously produced: _foo: subl $12, %esp movsd 16(%esp), %xmm0 movsd %xmm0, (%esp) movl $2147483647, %eax andl 4(%esp), %eax addl $12, %esp ret It might also make sense to do this for ISD::CALL nodes, which have implicit stores on many targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for recent legalizer changeNate Begeman2008-02-131-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47049 91177308-0d34-0410-b5e6-96231b3b80d8
* New tests.Evan Cheng2008-02-133-0/+71
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* Don't mask the isel bug.Evan Cheng2008-02-123-3/+3
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* This test assumes no SSE4.1.Evan Cheng2008-02-121-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47017 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some test cases.Evan Cheng2008-02-123-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46998 91177308-0d34-0410-b5e6-96231b3b80d8
* Determine whether a spill kills the register it's spilling before insertion ↵Evan Cheng2008-02-111-0/+10
| | | | | | rather than trying to undo the kill marker afterwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46953 91177308-0d34-0410-b5e6-96231b3b80d8
* Alignment of struct containing vectors depends onDale Johannesen2008-02-091-1/+1
| | | | | | | | | whether SSE is present, on Darwin anyway. Make it explicit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46909 91177308-0d34-0410-b5e6-96231b3b80d8
* It's not always safe to fold movsd into xorpd, etc. Check the alignment of ↵Evan Cheng2008-02-081-0/+99
| | | | | | the load address first to make sure it's 16 byte aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
* Added missing entries in X86 load / store folding tables.Evan Cheng2008-02-081-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing ↵Evan Cheng2008-02-072-33/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mode. Before: _main: subq $8, %rsp leaq _X(%rip), %rax movsd 8(%rax), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Now: _main: subq $8, %rsp movsd _X+8(%rip), %xmm1 movss _X(%rip), %xmm0 call _t xorl %ecx, %ecx movl %ecx, %eax addq $8, %rsp ret Notice there is another idiotic codegen issue that needs to be fixed asap: xorl %ecx, %ecx movl %ecx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
* It's PR1925, not PR1609.Evan Cheng2008-02-061-1/+1
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* Fix a number of local register allocator issues: PR1609.Evan Cheng2008-02-061-0/+19
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* Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.Evan Cheng2008-02-051-0/+12
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* If a vr is already marked alive in a bb, then it has PHI uses that are ↵Evan Cheng2008-02-051-0/+67
| | | | | | visited earlier, then it is not killed in the def block (i.e. not dead). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46763 91177308-0d34-0410-b5e6-96231b3b80d8
* Crashes LegalizeTypes with "Do not know how toDuncan Sands2008-02-041-0/+22
| | | | | | | expand the result of this operator!" (node: ctlz). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46713 91177308-0d34-0410-b5e6-96231b3b80d8
* Crashes LegalizeTypes with "Do not know how to splitDuncan Sands2008-02-041-0/+14
| | | | | | | this operator's operand" (node: extract_subvector). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46712 91177308-0d34-0410-b5e6-96231b3b80d8
* remove target triple to make this test more "generic"Chris Lattner2008-02-041-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46711 91177308-0d34-0410-b5e6-96231b3b80d8
* Crashed the new type legalizer. Not likely to catchDuncan Sands2008-02-041-0/+21
| | | | | | | | | | any bugs in the future since to get the crash you also need hacked in fake libcall support (which creates odd but legal trees), but since adding it doesn't hurt... Thanks to Chris for this ultimately reduced version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46706 91177308-0d34-0410-b5e6-96231b3b80d8
* CBackend: Implement unaligned load/store.Lauro Ramos Venancio2008-02-011-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46646 91177308-0d34-0410-b5e6-96231b3b80d8
* Add target triples to these so they don't fail on linux.Chris Lattner2008-01-292-0/+4
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* Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel2008-01-296-194/+79
| | | | | | | | | | | | | | | only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
* Update this test. Due to dag combiner improvements, we now compileChris Lattner2008-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | f7/f11 to: _f7: eor r0, r0, #2, 2 @ -2147483648 bx lr _f11: bic r0, r0, #2, 2 @ -2147483648 bx lr instead of: _f7: fmsr s0, r0 fnegs s0, s0 fmrs r0, s0 bx lr _f11: fmsr s0, r0 fabss s0, s0 fmrs r0, s0 bx lr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46423 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement some dag combines that allow doing fneg/fabs/fcopysign in integerChris Lattner2008-01-271-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | registers if used by a bitconvert or using a bitconvert. This allows us to avoid constant pool loads and use cheaper integer instructions when the values come from or end up in integer regs anyway. For example, we now compile CodeGen/X86/fp-in-intregs.ll to: _test1: movl $2147483648, %eax xorl 4(%esp), %eax ret _test2: movl $1065353216, %eax orl 4(%esp), %eax andl $3212836864, %eax ret Instead of: _test1: movss 4(%esp), %xmm0 xorps LCPI2_0, %xmm0 movd %xmm0, %eax ret _test2: movss 4(%esp), %xmm0 andps LCPI3_0, %xmm0 movss LCPI3_1, %xmm1 andps LCPI3_2, %xmm1 orps %xmm0, %xmm1 movd %xmm1, %eax ret bitconverts can happen due to various calling conventions that require fp values to passed in integer regs in some cases, e.g. when returning a complex. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
* New test to verify that "merging 4 loads into a vec load" continues to work and Chris Lattner2008-01-261-0/+35
| | | | | | | continues to infer alignment info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46403 91177308-0d34-0410-b5e6-96231b3b80d8
* Infer alignment of loads and increase their alignment when we can tell they are Chris Lattner2008-01-261-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from the stack. This allows us to compile stack-align.ll to: _test: movsd LCPI1_0, %xmm0 movapd %xmm0, %xmm1 *** andpd 4(%esp), %xmm1 andpd _G, %xmm0 addsd %xmm1, %xmm0 movl 20(%esp), %eax movsd %xmm0, (%eax) ret instead of: _test: movsd LCPI1_0, %xmm0 ** movsd 4(%esp), %xmm1 ** andpd %xmm0, %xmm1 andpd _G, %xmm0 addsd %xmm1, %xmm0 movl 20(%esp), %eax movsd %xmm0, (%eax) ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a useless xfailed test.Chris Lattner2008-01-261-27/+0
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* If there's no instructions being emitted on X86 for a function, emit aBill Wendling2008-01-261-0/+6
| | | | | | | nop. Emit the nop directly for PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46398 91177308-0d34-0410-b5e6-96231b3b80d8
* Need to convert to LLVM code and not C.Bill Wendling2008-01-261-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46397 91177308-0d34-0410-b5e6-96231b3b80d8