aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
* Write the section table and the section data in the same order thatRafael Espindola2011-03-201-2/+2
| | | | | | | gun as does. This makes it a lot easier to compare the output of both as the addresses are now a lot closer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127972 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessorsDaniel Dunbar2011-03-191-63/+0
| | | | | | to canonicalize IR", it broke a lot of things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127954 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IREvan Cheng2011-03-191-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to have single return block (at least getting there) for optimizations. This is general goodness but it would prevent some tailcall optimizations. One specific case is code like this: int f1(void); int f2(void); int f3(void); int f4(void); int f5(void); int f6(void); int foo(int x) { switch(x) { case 1: return f1(); case 2: return f2(); case 3: return f3(); case 4: return f4(); case 5: return f5(); case 6: return f6(); } } => LBB0_2: ## %sw.bb callq _f1 popq %rbp ret LBB0_3: ## %sw.bb1 callq _f2 popq %rbp ret LBB0_4: ## %sw.bb3 callq _f3 popq %rbp ret This patch teaches codegenprep to duplicate returns when the return value is a phi and where the phi operands are produced by tail calls followed by an unconditional branch: sw.bb7: ; preds = %entry %call8 = tail call i32 @f5() nounwind br label %return sw.bb9: ; preds = %entry %call10 = tail call i32 @f6() nounwind br label %return return: %retval.0 = phi i32 [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], ... [ 0, %entry ] ret i32 %retval.0 This allows codegen to generate better code like this: LBB0_2: ## %sw.bb jmp _f1 ## TAILCALL LBB0_3: ## %sw.bb1 jmp _f2 ## TAILCALL LBB0_4: ## %sw.bb3 jmp _f3 ## TAILCALL rdar://9147433 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127953 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for legalizing UINT_TO_FP of vectors on platforms which doNadav Rotem2011-03-191-0/+11
| | | | | | | | | | not have native support for this operation (such as X86). The legalized code uses two vector INT_TO_FP operations and is faster than scalarizing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127951 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheckize a test.Andrew Trick2011-03-191-7/+16
| | | | | | | (one-by-one until valgrind is happy) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127925 91177308-0d34-0410-b5e6-96231b3b80d8
* Match a few more obvious patterns to revsh. rdar://9147637.Evan Cheng2011-03-181-2/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127913 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127852; it's apparently causing an ICE on mingw.Eli Friedman2011-03-182-30/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127909 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Fix various codegen issuesJustin Holewinski2011-03-183-46/+91
| | | | | | | | - Emit mad instead of mad.rn for shader model 1.0 - Emit explicit mov.u32 instructions for reading global variables - (most PTX instructions cannot take global variable immediates) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127895 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: fix parameter order that is reversedChe-Liang Chiou2011-03-181-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127874 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: add unconditional and conditional branchChe-Liang Chiou2011-03-181-0/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127873 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a target-specific branchless method for double-width relationalEli Friedman2011-03-182-12/+30
| | | | | | | | | | | | | comparisons on x86. Essentially, the way this works is that SUB+SBB sets the relevant flags the same way a double-width CMP would. This is a substantial improvement over the generic lowering in LLVM. The output is also shorter than the gcc-generated output; I haven't done any detailed benchmarking, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127852 91177308-0d34-0410-b5e6-96231b3b80d8
* BuildUDIV: If the divisor is even we can simplify the fixup of the ↵Benjamin Kramer2011-03-171-0/+11
| | | | | | | | | | | | | | | | | | | | | | | multiplied value by introducing an early shift. This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into shrl $2, %edi imulq $613566757, %rdi, %rax shrq $32, %rax ret instead of movl %edi, %eax imulq $613566757, %rax, %rcx shrq $32, %rcx subl %ecx, %eax shrl %eax addl %ecx, %eax shrl $4, %eax on x86_64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsic for setpsc.Richard Osborne2011-03-171-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127821 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/h-registers-1.ll: Add explicit -mtriple=x86_64-linux. It ↵NAKAMURA Takumi2011-03-171-1/+1
| | | | | | does not need to be checked on x86_64-win32 (aka Win64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127800 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/constant-pool-remat-0.ll: FileCheck-ize and add explicit ↵NAKAMURA Takumi2011-03-161-4/+12
| | | | | | -mtriple=x86_64-linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127775 91177308-0d34-0410-b5e6-96231b3b80d8
* The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byteCameron Zwarich2011-03-161-3/+15
| | | | | | | | | | | rather than an int. Thankfully, this only causes LLVM to miss optimizations, not generate incorrect code. This just fixes the zext at the return. We still insert an i32 ZextAssert when reading a function's arguments, but it is followed by a truncate and another i8 ZextAssert so it is not optimized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127766 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename a test to be more inclusive.Cameron Zwarich2011-03-161-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127765 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fixDaniel Dunbar2011-03-161-111/+0
| | | | | | | plus the test where it used to break.", which broke Clang self-host of a Debug+Asserts compiler, on OS X. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127763 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsics for setclk, setrdy.Richard Osborne2011-03-161-0/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127761 91177308-0d34-0410-b5e6-96231b3b80d8
* Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test ↵Renato Golin2011-03-161-0/+111
| | | | | | where it used to break. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127757 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a test for i1 zeroext arguments on x86-64. We currently generate code thatCameron Zwarich2011-03-161-0/+23
| | | | | | | conforms to the ABI, but DAGCombine could in theory recognize the sequence of zext asserts and truncates and generate incorrect code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127754 91177308-0d34-0410-b5e6-96231b3b80d8
* Add checkevent intrinsic to check if any resources owned by the current threadRichard Osborne2011-03-161-0/+20
| | | | | | | can event. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127741 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and ↵NAKAMURA Takumi2011-03-1610-24/+54
| | | | | | x86_64-win32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127734 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: Add a pattern for Win64.NAKAMURA Takumi2011-03-167-22/+141
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127733 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They ↵NAKAMURA Takumi2011-03-1612-24/+62
| | | | | | are useless to Win64 target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127732 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/byval*.ll: Win64 has not supported byval yet.NAKAMURA Takumi2011-03-165-9/+102
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127731 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/dyn-stackalloc.ll: FileCheck-ize.NAKAMURA Takumi2011-03-161-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127730 91177308-0d34-0410-b5e6-96231b3b80d8
* Some minor cleanups based on feedback.Bill Wendling2011-03-151-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127694 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587Evan Cheng2011-03-151-0/+55
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127683 91177308-0d34-0410-b5e6-96231b3b80d8
* On the XCore the scavenging slot should be closest to the SP.Richard Osborne2011-03-151-0/+52
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsics for getps, setps, setsr and clrsr.Richard Osborne2011-03-152-0/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127678 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Set PTX 2.0 as the minimum supported versionJustin Holewinski2011-03-152-82/+83
| | | | | | | | - Remove PTX 1.4 code generation - Change type of intrinsics to .v4.i32 instead of .v4.i16 - Add and/or/xor integer instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127677 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng2011-03-151-0/+23
| | | | | | | | | | | | | | | | | | | | | | | v2 = bitcast v1 ... v3 = bitcast v2 ... = v3 => v2 = bitcast v1 ... = v1 if v1 and v3 are of in the same register class. bitcast between i32 and fp (and others) are often not nops since they are in different register classes. These bitcast instructions are often left because they are in different basic blocks and cannot be eliminated by dag combine. rdar://9104514 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127668 91177308-0d34-0410-b5e6-96231b3b80d8
* sext(undef) = 0, because the top bits will all be the same.Evan Cheng2011-03-151-2/+2
| | | | | | | zext(undef) = 0, because the top bits will be zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase for r127630.Bill Wendling2011-03-151-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127648 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach2011-03-151-1/+1
| | | | | | | Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-141-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127630 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix this test up a bit.Eric Christopher2011-03-141-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127621 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng2011-03-142-5/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127598 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Emit global arrays with proper sizesJustin Holewinski2011-03-142-40/+40
| | | | | | | - Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127584 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski2011-03-141-0/+56
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127578 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou2011-03-141-0/+109
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127577 91177308-0d34-0410-b5e6-96231b3b80d8
* Saving files before committing is overrated.Eric Christopher2011-03-121-1/+1
| | | | | | | Add a RUN line to this test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127520 91177308-0d34-0410-b5e6-96231b3b80d8
* Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher2011-03-121-0/+60
| | | | | | | | | | Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach2011-03-1111-18/+18
| | | | | | | | effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
* Roll r127459 back in:Cameron Zwarich2011-03-1113-15/+14
| | | | | | | | | | | Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich2011-03-111-0/+19
| | | | | | | protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar2011-03-1113-14/+15
| | | | | | created from the", it broke some GCC test suite tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize trivial branches in CodeGenPrepare, which often get created from theCameron Zwarich2011-03-1113-15/+14
| | | | | | | | | | lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the x86 32-bit scheduler to register pressure and fix up theEric Christopher2011-03-115-5/+4
| | | | | | | | | corresponding testcases back to the previous versions. Fixes some performance regressions only seen on 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2024-09-12 09:35:20 +0000