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* Add thumb2 sign / zero extend with rotate instructions.Evan Cheng2009-07-034-1/+135
* Added indexed stores.Evan Cheng2009-07-032-0/+39
* Sign extending pre/post indexed loads.Evan Cheng2009-07-021-1/+10
* Thumb2 pre/post indexed loads.Evan Cheng2009-07-022-0/+31
* @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.Chris Lattner2009-07-021-1/+1
* Fix yet-another bug I introduced into fastisel, this time handlingChris Lattner2009-07-021-0/+17
* Fix codegen for references to available_externally symbols. This fixesChris Lattner2009-07-011-0/+69
* CommuteChangesDestination() should check if to-be-commuted instruction define...Evan Cheng2009-07-011-0/+130
* Remove special handling of implicit_def. Fix a couple more bugs in liveinterv...Evan Cheng2009-07-011-0/+99
* Fix some fast-isel problems selecting global variable addressing inChris Lattner2009-07-011-0/+24
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-012-0/+256
* Add PIC load and store patterns for Thumb-2.David Goodwin2009-07-013-2/+51
* Add thumb-2 store word, halfword, and byte.David Goodwin2009-06-303-0/+189
* Improve Thumb-2 jump table support.David Goodwin2009-06-301-0/+26
* Fix PR4485.Rafael Espindola2009-06-302-1/+16
* Fix PR4484.Rafael Espindola2009-06-301-0/+15
* Temporarily restore the scavenger implicit_def checking code. MachineOperand ...Evan Cheng2009-06-301-0/+116
* Add a bit IsUndef to MachineOperand. This indicates the def / use register op...Evan Cheng2009-06-301-0/+122
* A few more load instructions.Evan Cheng2009-06-303-0/+147
* Enhance tests to include shifted-register operand testing.David Goodwin2009-06-3014-19/+425
* Add Thumb-2 support for TEQ amd TST.David Goodwin2009-06-294-0/+192
* Thumb-2 testsDavid Goodwin2009-06-297-15/+65
* FIX PR 4459.Rafael Espindola2009-06-291-0/+15
* Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only ...David Goodwin2009-06-291-0/+25
* Implement Thumb2 ldr.Evan Cheng2009-06-292-7/+102
* factor some logic out into a helper function, allow remat of loads from constantChris Lattner2009-06-271-2/+1
* Reimplement rip-relative addressing in the X86-64 backend. The newChris Lattner2009-06-272-1/+2
* remove some unneeded eh info.Chris Lattner2009-06-273-4/+4
* testcase for PR4466Chris Lattner2009-06-271-0/+16
* When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a...David Goodwin2009-06-261-0/+11
* Add some testcases for some of the recent ScalarEvolution bug fixes.Dan Gohman2009-06-261-0/+386
* Thumb-2 testsDavid Goodwin2009-06-2627-15/+318
* remove unwind info, add test for asmprinting of jump table labels with (%rip)Chris Lattner2009-06-261-1/+4
* Add x86 support for 'n' inline asm modifier. This will be handled target inde...Evan Cheng2009-06-261-0/+8
* Thumb-2 has CLZ.David Goodwin2009-06-261-0/+8
* Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".David Goodwin2009-06-263-4/+4
* More spelling Count as count.Daniel Dunbar2009-06-2612-12/+12
* Spell Count as count.Daniel Dunbar2009-06-262-2/+2
* Add Thumb-2 tests.David Goodwin2009-06-2612-2/+195
* ADC used to implement adde should use "adcs" opcode instead of "adc". David Goodwin2009-06-263-2/+40
* ORN and BIC tests.David Goodwin2009-06-263-3/+16
* Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction...David Goodwin2009-06-262-0/+41
* Fix tests: Count -> count.Evan Cheng2009-06-262-2/+2
* Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's l...Evan Cheng2009-06-262-0/+26
* Fix spelling of 'count'Daniel Dunbar2009-06-261-1/+1
* Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry b...Evan Cheng2009-06-252-4/+4
* Use MVN for ~t2_so_imm immediates.David Goodwin2009-06-251-0/+27
* Don't grep the -debug output. This isn't the way to test changes.Bill Wendling2009-06-251-1/+0
* down with unwind info :)Chris Lattner2009-06-251-1/+1
* ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and S...Evan Cheng2009-06-252-0/+32