aboutsummaryrefslogtreecommitdiffstats
path: root/test/MC/Disassembler/ARM/thumb1.txt
Commit message (Collapse)AuthorAgeFilesLines
* This corrects the implementation of Thumb ADR instruction. There are three ↵Mihai Popa2013-07-031-1/+5
| | | | | | | | | | | issues: 1. it should accept only 4-byte aligned addresses 2. the maximum offset should be 1020 3. it should be encoded with the offset scaled by two bits git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185528 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix thumb1 nop decodingAmaury de la Vieuville2013-06-241-8/+2
| | | | | | | In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8. However the disassembler should not use this alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184703 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-301-0/+2
| | | | | | | | | When the operand is a plain immediate rather than a label, print it as [pc, #imm] like we do for the Thumb2 wide encoding variant. rdar://12154503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-061-1/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158055 91177308-0d34-0410-b5e6-96231b3b80d8
* Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton2012-05-021-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155983 91177308-0d34-0410-b5e6-96231b3b80d8
* Support an extension of ARM asm syntax to allow immediate operands to ADR ↵Owen Anderson2011-08-261-0/+6
| | | | | | instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
* Port over additional encoding tests to decoding tests, and fix an operand ↵Owen Anderson2011-08-251-0/+31
| | | | | | ordering bug this exposed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
* Port over more encoding tests to decoding tests.Owen Anderson2011-08-241-0/+148
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138441 91177308-0d34-0410-b5e6-96231b3b80d8
* Port more assemble tests over to disassembly tests.Owen Anderson2011-08-231-0/+59
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138336 91177308-0d34-0410-b5e6-96231b3b80d8
* Port another swathe of Thumb1 encoding tests over to decoding tests.Owen Anderson2011-08-221-0/+153
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138250 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add ↵Owen Anderson2011-08-221-0/+30
| | | | | | more tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138246 91177308-0d34-0410-b5e6-96231b3b80d8
* More Thumb1 decoding tests.Owen Anderson2011-08-181-0/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137974 91177308-0d34-0410-b5e6-96231b3b80d8
* Port over BL/BLX to disassembly tests.Owen Anderson2011-08-181-3/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137954 91177308-0d34-0410-b5e6-96231b3b80d8
* Port new Thumb1 encoding tests over to decoding tests.Owen Anderson2011-08-171-0/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137902 91177308-0d34-0410-b5e6-96231b3b80d8
* Start building a Thumb1 decoding test file based on the Thumb1 ↵Owen Anderson2011-08-171-0/+30
parsing/encoding test file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137840 91177308-0d34-0410-b5e6-96231b3b80d8