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* Fixed handling of immediate operand sizes, whichSean Callanan2010-10-221-0/+3
* ARM instructions that are both predicated and set the condition codesBob Wilson2010-10-151-3/+3
* Refactor the ARM 'setend' instruction pattern. Use a single instruction patternJim Grosbach2010-10-131-0/+6
* Added a testcase for the ENTER instruction.Sean Callanan2010-10-051-1/+4
* Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer2010-09-171-0/+3
* add a test of an edge case value for the FP immediate (needs all digits ofJim Grosbach2010-09-151-0/+3
* Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to registerJim Grosbach2010-09-151-0/+2
* Reapply r113875 with additional cleanups.Jim Grosbach2010-09-141-1/+3
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-172-0/+8
* Add a Thumb2 t2RSBrr instruction for disassembly only.Bob Wilson2010-08-131-0/+4
* Move the Thumb2 SSAT and USAT optional shift operator out of theBob Wilson2010-08-131-0/+4
* Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen2010-08-121-0/+6
* The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen2010-08-121-0/+2
* Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen2010-08-111-0/+6
* Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson2010-08-111-0/+4
* Add an ARM RSCrr instruction for disassembly only.Bob Wilson2010-08-051-0/+4
* Add an ARM RSBrr instruction for disassembly only.Bob Wilson2010-08-051-0/+4
* ARM "rrx" shift operands do not have an immediate. PR7790.Bob Wilson2010-08-051-0/+4
* Add support for disassembling VMVN (immediate) instructions. PR7747.Bob Wilson2010-07-311-0/+3
* my work on adding segment registers to LEA missed the Chris Lattner2010-07-131-0/+3
* Eliminated the classification of control registers into %ecr_Sean Callanan2010-05-061-0/+3
* Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen2010-04-211-2/+5
* When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrS...Johnny Chen2010-04-201-0/+3
* For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='11...Johnny Chen2010-04-201-0/+3
* According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen2010-04-191-0/+3
* ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen2010-04-191-0/+4
* testcase for r101538, patch by Nico Schmidt!Chris Lattner2010-04-171-0/+3
* Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.Johnny Chen2010-04-161-1/+1
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-161-0/+3
* In the same spirit of r101524, which removed the assert() from printAddrMode2...Johnny Chen2010-04-161-0/+3
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-161-0/+3
* Added another test case for am3offset operand, testing Rn, #+/-imm8.Johnny Chen2010-04-151-0/+3
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-0/+3
* tests: MC/Disassembler tests depend on ARM support being compiler in.Daniel Dunbar2010-04-151-1/+3
* Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after callingJohnny Chen2010-04-121-0/+3
* unXFAIL, arm disassembler was reenabled.Benjamin Kramer2010-04-073-3/+0
* Reverting 100265 to try to get buildbots green again. Lots of self-hosting bu...Evan Cheng2010-04-053-0/+3
* Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen2010-04-023-0/+184
* Fix the vmxon entry in the X86InstrInfo.td so it has the correct prefix bytesKevin Enderby2010-03-081-1/+10
* add encoder support and tests for rdtscpChris Lattner2010-02-131-1/+4
* remove special cases for vmlaunch, vmresume, vmxoff, and swapgsChris Lattner2010-02-131-0/+12
* add some disassemble testcases for weird instructionsChris Lattner2010-02-121-0/+14
* specify a triple to use, fixing the test on non-x86-64 hosts.Chris Lattner2009-12-221-1/+1
* various cleanups, make the disassemble reject lines with too muchChris Lattner2009-12-221-1/+1
* rewrite the file parser for the disassembler, implementing support forChris Lattner2009-12-222-0/+19