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* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-111-0/+8
| | | | | | | | | As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for numeric displacement expressions in bracketedChad Rosier2013-04-051-1/+38
| | | | | | | | | | | | | | | | | | | | | | | memory operands. Essentially, this layers an infix calculator on top of the parsing state machine. The scale on the index register is still expected to be an immediate __asm mov eax, [eax + ebx*4] and will not work with more complex expressions. For example, __asm mov eax, [eax + ebx*(2*2)] The plus and minus binary operators assume the numeric value of a register is zero so as to not change the displacement. Register operands should never be an operand for a multiply or divide operation; the scale*indexreg expression is always replaced with a zero on the operand stack to prevent such a case. rdar://13521380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support of RDSEED defined in AVX2 extensionMichael Liao2013-03-281-0/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178314 91177308-0d34-0410-b5e6-96231b3b80d8
* Move test since it depends on the X86 backend.Rafael Espindola2013-03-281-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178249 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support of imm displacement before bracketed memoryChad Rosier2013-03-271-0/+20
| | | | | | | | | | | | | | | expression. Specifically, this syntax: ImmDisp [ BaseReg + Scale*IndexReg + Disp ] We don't currently support: ImmDisp [ Symbol ] rdar://13518671 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178186 91177308-0d34-0410-b5e6-96231b3b80d8
* x86 -- add the XTEST instructionDave Zarzycki2013-03-251-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177888 91177308-0d34-0410-b5e6-96231b3b80d8
* Post process ADC/SBB and use a shorter encoding if they use a sign extended ↵Craig Topper2013-03-181-0/+14
| | | | | | immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177243 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor some duplicated code into helper functions.Craig Topper2013-03-181-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177242 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ↵Craig Topper2013-03-141-0/+4
| | | | | | set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177014 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes a test by replacing .align by .p2align and setting triples explicitly.Eli Bendersky2013-03-051-2/+5
| | | | | | | | Patch by David Sehr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176502 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a test that .align directives on capable processors use long NOPs.David Sehr2013-03-051-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176490 91177308-0d34-0410-b5e6-96231b3b80d8
* The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr2013-03-051-0/+27
| | | | | | | | | | | | one-byte NOPs. If the processor actually executes those NOPs, as it sometimes does with aligned bundling, this can have a performance impact. From my micro-benchmarks run on my one machine, a 15-byte NOP followed by twelve one-byte NOPs is about 20% worse than a 15 followed by a 12. This patch changes NOP emission to emit as many 15-byte (the maximum) as possible followed by at most one shorter NOP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176464 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for the pushad/popad mnemonics.Chad Rosier2013-02-251-0/+13
| | | | | | rdar://13254235 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
* 'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay2013-02-251-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r15266. This fixes llvm.org/pr15266.Rafael Espindola2013-02-141-14/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175173 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for lexing binary integers with a [bB] suffix.Chad Rosier2013-02-121-0/+14
| | | | | | | | | | | | | | | This is complicated by backward labels (e.g., 0b can be both a backward label and a binary zero). The current implementation assumes [0-9]b is always a label and thus it's possible for 0b and 1b to not be interpreted correctly for ms-style inline assembly. However, this is relatively simple to fix in the inline assembly (i.e., drop the [bB]). This patch also limits backward labels to [0-9]b, so that only 0b and 1b are ambiguous. Part of rdar://12470373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174983 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.Chad Rosier2013-02-121-0/+26
| | | | | | Part of rdar://12470373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174926 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC] Bundle alignment: Invalidate relaxed fragmentsDerek Schuff2013-02-051-0/+16
| | | | | | | | | | | | | | | | Currently, when a fragment is relaxed, its size is modified, but its offset is not (it gets laid out as a side effect of checking whether it needs relaxation), then all subsequent fragments are invalidated because their offsets need to change. When bundling is enabled, relaxed fragments need to get laid out again, because the increase in size may push it over a bundle boundary. So instead of only invalidating subsequent fragments, also invalidate the fragment that gets relaxed, which causes it to get laid out again. This patch also fixes some trailing whitespace and fixes the bundling-related debug output of MCFragments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174401 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC] bundle alignment: prevent padding instructions from crossing bundle ↵Derek Schuff2013-01-312-2/+108
| | | | | | boundaries git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174067 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge SSE and AVX shuffle instructions in the comment printer.Craig Topper2013-01-291-0/+225
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173777 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 256-bit PALIGNR comment decoding to understand that it works on ↵Craig Topper2013-01-281-0/+15
| | | | | | independent 256-bit lanes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173674 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Decode PALIGN operands so I don't have to do it in my head.Benjamin Kramer2013-01-261-0/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173572 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,Eli Bendersky2013-01-251-2/+2
| | | | | | | | | use them in tests that run llvm-dwarfdump. This is in order to make tests as specific as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173498 91177308-0d34-0410-b5e6-96231b3b80d8
* Add forgotten test case for the x32 commitEli Bendersky2013-01-221-0/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173181 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Make sure we account for the FMA4 register immediate value, otherwise ↵Benjamin Kramer2013-01-221-0/+61
| | | | | | | | rip-rel relocations will be off by one byte. PR15040. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173176 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Extend support for parsing Intel bracketed memory operands thatChad Rosier2013-01-141-9/+191
| | | | | | | | have an arbitrary ordering of the base register, index register and displacement. rdar://12527141 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172484 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some additional tests for the .bundle_lock align_to_end feature that didn'tEli Bendersky2013-01-073-0/+2837
| | | | | | | | | | | make into the last commit. Also, update the test-generation script to generate an exhaustive test for align_to_end as well, and include the generated test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171811 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the align_to_end option to .bundle_lock in the MC implementation of alignedEli Bendersky2013-01-071-0/+4
| | | | | | | | | | bundling. The document describing this feature and the implementation has also been updated: https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171797 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, ↵Craig Topper2013-01-064-101/+141
| | | | | | | | | | | | | cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior. cvtsi2* should parse with an 'l' or 'q' suffix or no suffix at all. No suffix should be treated the same as 'l' suffix. Printing should always print a suffix. Previously we didn't parse or print an 'l' suffix. cvtt*2si/cvt*2si should parse with an 'l' or 'q' suffix or not suffix at all. No suffix should use the destination register size to choose encoding. Printing should not print a suffix. Original 'l' suffix issue with cvtsi2* pointed out by Michael Kuperstein. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171668 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds missing aliases for fcom and fcomp instructions without arguments.Kevin Enderby2013-01-021-0/+8
| | | | | | | Patch by Michael M Kuperstein! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171414 91177308-0d34-0410-b5e6-96231b3b80d8
* Change Lit error redirection to FileCheck to a more common syntax since itEli Bendersky2012-12-206-6/+6
| | | | | | | can potentially cause some bots to fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170726 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a largish auto-generated test for the aligned bundling feature, along withEli Bendersky2012-12-201-0/+2674
| | | | | | | | | | | | | | the script generating it. The test should never be modified manually. If anyone needs to change it, please change the script and re-run it. The script is placed into utils/testgen - I couldn't think of a better place, and after some discussion on IRC this looked like a logical location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170720 91177308-0d34-0410-b5e6-96231b3b80d8
* Tests for the aligned bundling support added in r170718Eli Bendersky2012-12-2011-0/+246
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170719 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this Lit config file a bit slimmerEli Bendersky2012-12-131-8/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170083 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach2012-11-141-1/+1
| | | | | | | | | | When an instruction as written requires 32-bit mode and we're assembling in 64-bit mode, or vice-versa, issue a more specific diagnostic about what's wrong. rdar://12700702 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support of RTM from TSX extensionMichael Liao2012-11-081-0/+13
| | | | | | | | | | - Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167573 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier2012-10-291-0/+50
| | | | | | | equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
* Tell llvm-mc we're using intel syntax, so we don't have to use directives.Chad Rosier2012-10-241-8/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166640 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add back-end test case for r166632. Make sure we emit theChad Rosier2012-10-241-0/+12
| | | | | | | | correct .s output as well as get the correct encoding by the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166638 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Depending on the local semantics of .align this test can also emit a ↵Benjamin Kramer2012-10-131-1/+1
| | | | | | nopl instead of nopw. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165880 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Disable long nops for all cpus prior to pentiumpro/i686.Benjamin Kramer2012-10-131-2/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165878 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/MC/X86/x86_nop.s: Make sure -arch=x86 when -mcpu=geode.NAKAMURA Takumi2012-09-191-1/+1
| | | | | | -mcpu doesn't infer -arch. Consider non-x86 host. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164185 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for r164132.Roman Divacky2012-09-181-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164134 91177308-0d34-0410-b5e6-96231b3b80d8
* Add newline.Chad Rosier2012-09-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163565 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for .att_syntax directive.Chad Rosier2012-09-101-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163542 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix encoding of 'movd %xmm0, %rax'Jim Grosbach2012-08-311-0/+4
| | | | | | | The assembly string for the VMOVPQIto64rr instruction incorrectly lacked the 'v' prefix, resulting in mis-assembly of the vanilla movd instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162963 91177308-0d34-0410-b5e6-96231b3b80d8
* Make l/q suffixes on AVX forms of scalar convert instructions consistent ↵Craig Topper2012-07-262-28/+28
| | | | | | with their non-AVX forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160775 91177308-0d34-0410-b5e6-96231b3b80d8
* Make x86 asm parser to check for xmm vs ymm for index register in gather ↵Craig Topper2012-07-182-0/+34
| | | | | | instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse assembler/disassembler operand order for gather instructions.Craig Topper2012-07-101-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159983 91177308-0d34-0410-b5e6-96231b3b80d8
* Add aliases for pblendvb, blendvpd, and blendvps instructions with the ↵Craig Topper2012-07-031-0/+26
| | | | | | implicit xmm0 operand specified. Fixes PR13252. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159644 91177308-0d34-0410-b5e6-96231b3b80d8
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