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* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-301-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147368 91177308-0d34-0410-b5e6-96231b3b80d8
* Add FMA4 instructions to disassembler.Craig Topper2011-12-301-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8
* Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to ↵Craig Topper2011-12-301-0/+24
| | | | | | force alignment on these instructions. Add a couple testcases for memory forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147361 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 ↵Craig Topper2011-12-301-0/+28
| | | | | | size, but with the special handling to be compatible with the intrinsic expecting a vector. Similar handling is already used elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147360 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup stack/frame register define/kill states. This fixes two bugs:Hal Finkel2011-12-302-8/+14
| | | | | | | | 1. The ST*UX instructions that store and update the stack pointer did not set define/kill on R1. This became a problem when I activated post-RA scheduling (and had incorrectly adjusted the Frames-large test). 2. eliminateFrameIndex did not kill its scavenged temporary register, and this could cause the scavenger to exhaust all available registers (and its emergency spill slot) when there were a lot of CR values to spill. The 2010-02-12-saveCR test has been adjusted to check for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147359 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement cfi_restore. Patch by Brian Anderson!Rafael Espindola2011-12-291-0/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147356 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ↵Craig Topper2011-12-291-0/+12
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147353 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement .cfi_escape. Patch by Brian Anderson!Rafael Espindola2011-12-291-0/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147352 91177308-0d34-0410-b5e6-96231b3b80d8
* Expose FMA3 instructions to the disassembler.Craig Topper2011-12-291-0/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147351 91177308-0d34-0410-b5e6-96231b3b80d8
* Change CaptureTracking to pass a Use* instead of a Value* when a value isNick Lewycky2011-12-282-1/+62
| | | | | | | | | | | | | | | captured. This allows the tracker to look at the specific use, which may be especially interesting for function calls. Use this to fix 'nocapture' deduction in FunctionAttrs. The existing one does not iterate until a fixpoint and does not guarantee that it produces the same result regardless of iteration order. The new implementation builds up a graph of how arguments are passed from function to function, and uses a bottom-up walk on the argument-SCCs to assign nocapture. This gets us nocapture more often, and does so rather efficiently and independent of iteration order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147327 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix type-checking for load transformation which is not legal on ↵Eli Friedman2011-12-281-0/+14
| | | | | | floating-point types. PR11674. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147323 91177308-0d34-0410-b5e6-96231b3b80d8
* PR11662.Nadav Rotem2011-12-281-0/+20
| | | | | | | | | Promotion of the mask operand needs to be done using PromoteTargetBoolean, and not padded with garbage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147309 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug in LowerVECTOR_SHUFFLE and LowerBUILD_VECTOR.Elena Demikhovsky2011-12-281-1/+15
| | | | | | | | | Matching MOVLP mask for AVX (265-bit vectors) was wrong. The failure was detected by conformance tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147308 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn cos(-x) into cos(x). Patch by Alexander Malyshev!Nick Lewycky2011-12-271-0/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147291 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach simplifycfg to recompute branch weights when merging some branches, andNick Lewycky2011-12-271-2/+64
| | | | | | | | to discard weights when appropriate. Still more to do (and a new TODO), but it's a start! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147286 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure DAGCombiner doesn't introduce multiple loads from the same memory ↵Eli Friedman2011-12-262-5/+21
| | | | | | location. PR10747, part 2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147283 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the branch weight metadata when reversing the order of a branch.Nick Lewycky2011-12-261-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147280 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an explicit test that we now fold cttz.i32(..., true) >> 5 -> 0.Chandler Carruth2011-12-241-7/+13
| | | | | | This is a result of Benjamin's work on ValueTracking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147259 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Add a combine that turns (2^n)-1 ^ x back into (2^n)-1 - x iff ↵Benjamin Kramer2011-12-241-0/+12
| | | | | | | | | x is smaller than 2^n and it fuses with a following add. This was intended to undo the sub canonicalization in cases where it's not profitable, but it also finds some cases on it's own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147256 91177308-0d34-0410-b5e6-96231b3b80d8
* ComputeMaskedBits: Make knownzero computation more aggressive for ctlz with ↵Benjamin Kramer2011-12-242-3/+16
| | | | | | | | | undef zero. unsigned foo(unsigned x) { return 31 - __builtin_clz(x); } now compiles into a single "bsrl" instruction on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147255 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Canonicalize (2^n)-1 - x into (2^n)-1 ^ x iff x is known to be ↵Benjamin Kramer2011-12-241-0/+12
| | | | | | | | | | | smaller than 2^n. This has the obvious advantage of being commutable and is always a win on x86 because const - x wastes a register there. On less weird architectures this may lead to a regression because other arithmetic doesn't fuse with it anymore. I'll address that problem in a followup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147254 91177308-0d34-0410-b5e6-96231b3b80d8
* Use standard promotion for i8 CTTZ nodes and i8 CTLZ nodes when theChandler Carruth2011-12-243-5/+5
| | | | | | | | | | | | | | | | | | LZCNT instructions are available. Force promotion to i32 to get a smaller encoding since the fix-ups necessary are just as complex for either promoted type We can't do standard promotion for CTLZ when lowering through BSR because it results in poor code surrounding the 'xor' at the end of this instruction. Essentially, if we promote the entire CTLZ node to i32, we end up doing the xor on a 32-bit CTLZ implementation, and then subtracting appropriately to get back to an i8 value. Instead, our custom logic just uses the knowledge of the incoming size to compute a perfect xor. I'd love to know of a way to fix this, but so far I'm drawing a blank. I suspect the legalizer could be more clever and/or it could collude with the DAG combiner, but how... ;] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147251 91177308-0d34-0410-b5e6-96231b3b80d8
* Add systematic testing for cttz as well, and fix the bug I spotted byChandler Carruth2011-12-241-0/+30
| | | | | | inspection earlier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147250 91177308-0d34-0410-b5e6-96231b3b80d8
* Add i8 and i64 testing for ctlz on x86. Also simplify the i16 test.Chandler Carruth2011-12-241-4/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147249 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up this rather crufty test. Put the declarations at the top to makeChandler Carruth2011-12-241-33/+32
| | | | | | | | | | | | | my C-brain happy. Remove the unnecessary bits of pedantic IR fluff like nounwind. Remove stray uses comments. Name things semantically rather than tN so that adding a new test in the middle doesn't cause pain, and so that new tests can be grouped semantically. This exposes how little systematic testing is going on here. I noticed this by finding several bugs via inspection and wondering why this test wasn't catching any of them. =[ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147248 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand more when we have a nice 'tzcnt' instruction, to avoid generatingChandler Carruth2011-12-241-0/+28
| | | | | | | | | | | 'bsf' instructions here. This one is actually debatable to my eyes. It's not clear that any chip implementing 'tzcnt' would have a slow 'bsf' for any reason, and unless EFLAGS or a zero input matters, 'tzcnt' is just a longer encoding. Still, this restores the old behavior with 'tzcnt' enabled for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147246 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up some of these tests.Chandler Carruth2011-12-241-22/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147245 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the lowering of CTLZ_ZERO_UNDEF from a .td pattern back to theChandler Carruth2011-12-242-1/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | X86ISelLowering C++ code. Because this is lowered via an xor wrapped around a bsr, we want the dagcombine which runs after isel lowering to have a chance to clean things up. In particular, it is very common to see code which looks like: (sizeof(x)*8 - 1) ^ __builtin_clz(x) Which is trying to compute the most significant bit of 'x'. That's actually the value computed directly by the 'bsr' instruction, but if we match it too late, we'll get completely redundant xor instructions. The more naive code for the above (subtracting rather than using an xor) still isn't handled correctly due to the dagcombine getting confused. Also, while here fix an issue spotted by inspection: we should have been expanding the zero-undef variants to the normal variants when there is an 'lzcnt' instruction. Do so, and test for this. We don't want to generate unnecessary 'bsr' instructions. These two changes fix some regressions in encoding and decoding benchmarks. However, there is still a *lot* to be improve on in this type of code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147244 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup this test a bit, sorting things and grouping them more clearly.Chandler Carruth2011-12-241-21/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147243 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for r147232.Akira Hatanaka2011-12-241-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147233 91177308-0d34-0410-b5e6-96231b3b80d8
* Move this test from date-name to feature-name, and port it to FileCheck.Nick Lewycky2011-12-231-2/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147223 91177308-0d34-0410-b5e6-96231b3b80d8
* Experimental support for aligned NEON spills.Jakob Stoklund Olesen2011-12-231-0/+73
| | | | | | | | | | | | | ARM targets with NEON units have access to aligned vector loads and stores that are potentially faster than unaligned operations. Add support for spilling the callee-saved NEON registers to an aligned stack area using 16-byte aligned NEON loads and store. This feature is off by default, controlled by an -align-neon-spills command line option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147211 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-221-0/+12
| | | | | | rdar://10558523 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147189 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix incorrect relocation generation. Patch by Kristof Beyls.Rafael Espindola2011-12-221-0/+23
| | | | | | Fixes PR11214. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147180 91177308-0d34-0410-b5e6-96231b3b80d8
* Reinstate r146578; it doesn't appear to be the cause of some recent execution-Chad Rosier2011-12-223-0/+313
| | | | | | | | | | time regressions. In general, it is beneficial to compile-time. Original commit message: Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147175 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembler should accept shift-by-zero for any shifted-immediate operand.Jim Grosbach2011-12-221-0/+17
| | | | | | | | Just treat it as-if the shift wasn't there at all. 'as' compatibility. rdar://10604767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147153 91177308-0d34-0410-b5e6-96231b3b80d8
* Give string constants generated by IRBuilder private linkage.Benjamin Kramer2011-12-221-1/+1
| | | | | | Fixes PR11640. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147144 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the unreachable probability much much heavier. The previousChandler Carruth2011-12-221-9/+9
| | | | | | | | | | probability wouldn't be considered "hot" in some weird loop structures or other compounding probability patterns. This makes it much harder to confuse, but isn't really a principled fix. I'd actually like it if we could model a zero probability, as it would make this much easier to reason about. Suggestions for how to do this better are welcome. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147142 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively revert r146578 to determine if it is the cause of a number ofChad Rosier2011-12-223-313/+0
| | | | | | | | | | | performance regressions (both execution-time and compile-time) on our nightly testers. Original commit message: Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147131 91177308-0d34-0410-b5e6-96231b3b80d8
* Local dynamic TLS model for direct object output. Create the correct TLS MIPSAkira Hatanaka2011-12-221-0/+36
| | | | | | | | | | ELF relocations. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147118 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VFP optional data type on VMOV GPR<-->SPR.Jim Grosbach2011-12-211-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147104 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 assembly parsing of 'mov rd, rn, rrx'.Jim Grosbach2011-12-211-1/+2
| | | | | | | | Maps to the RRX instruction. Missed this case earlier. rdar://10615373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 assembly parsing of 'mov(register shifted register)' aliases.Jim Grosbach2011-12-211-0/+25
| | | | | | | | These map to the ASR, LSR, LSL, ROR instruction definitions. rdar://10615373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147094 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON assmebly parsing for VLD2 to all lanes instructions.Jim Grosbach2011-12-211-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147069 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple of copy-n-paste bugs. Noticed by George Russell!Chad Rosier2011-12-211-0/+58
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147064 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some intrinsics safe to speculatively execute.Nick Lewycky2011-12-211-3/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147036 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple of copy-n-paste bugs. Noticed by George Russell.Evan Cheng2011-12-211-4/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147032 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-211-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147025 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in zero-store peephole pattern reported in pr11615.Akira Hatanaka2011-12-211-0/+19
| | | | | | | | The patch and test case were originally written by Mans Rullgard. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147024 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand 64-bit CTLZ nodes if target architecture does not support it. Add testAkira Hatanaka2011-12-211-0/+19
| | | | | | | case for DCLO and DCLZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147022 91177308-0d34-0410-b5e6-96231b3b80d8
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