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* Fix a off by one error about which members need to use the string table.Rafael Espindola2013-07-121-0/+22
* LFTR improvement to avoid truncation.Andrew Trick2013-07-121-0/+44
* R600: Reapply testcase from r186178, the big endian issue should be fixed by ...Benjamin Kramer2013-07-121-0/+12
* Change archive-update.test to create a new file on the fly.Rafael Espindola2013-07-122-3/+6
* Rename directory to avoid problems on windows.Rafael Espindola2013-07-122-2/+2
* Change llvm-ar to use lib/Object.Rafael Espindola2013-07-122-3/+5
* Add a test for llvm-ar's u option.Rafael Espindola2013-07-122-0/+26
* R600: Remove the fpconst64.ll test which was failing on non-x86 buildbotsTom Stellard2013-07-121-12/+0
* X86 cost model: Add cost for vectorized gather/scatherArnold Schwaighofer2013-07-121-0/+86
* ARM cost model: Add cost for gather/scatherArnold Schwaighofer2013-07-121-0/+88
* Relax the test a bit more to handle different UIDs and GIDs.Rafael Espindola2013-07-121-1/+1
* Relax test a bit to handle umask differences.Rafael Espindola2013-07-121-1/+1
* Add a test for the 'o' option in llvm-ar.Rafael Espindola2013-07-121-0/+10
* R600/SI: Add support for f64 kernel argumentsTom Stellard2013-07-121-0/+9
* R600/SI: Implement select and compares for SITom Stellard2013-07-121-0/+79
* R600/SI: Add fsqrt pattern for SITom Stellard2013-07-121-0/+24
* R600/SI: Add double precision fsub pattern for SITom Stellard2013-07-121-0/+13
* R600/SI: SI support for 64bit ConstantFPTom Stellard2013-07-121-0/+12
* R600/SI: Add initial double precision support for SITom Stellard2013-07-124-0/+60
* X86: Shrink certain forms of movsx.Benjamin Kramer2013-07-124-6/+27
* X86: fold SSE2/AVX2 logical shift by immediate amount into zero vector when p...Stephen Lin2013-07-122-0/+494
* Start using CHECK-LABEL in some tests.Stephen Lin2013-07-1212-110/+111
* Add new directive called CHECK-LABEL to FileCheck.Stephen Lin2013-07-121-0/+51
* Don't reject an empty archive.Rafael Espindola2013-07-122-0/+4
* Revert "indvars: Improve LFTR by eliminating truncation when comparingChandler Carruth2013-07-121-25/+0
* Add support for Mips break and syscall insructions. The corresponding test ca...Vladimir Medic2013-07-121-0/+10
* [SystemZ] Add test missing from r186148Richard Sandiford2013-07-121-0/+82
* [SystemZ] Optimize sign-extends of vector setccsRichard Sandiford2013-07-121-0/+70
* [SystemZ] Improve spilling of LGDR and LDGRRichard Sandiford2013-07-121-0/+288
* SLPVectorizer: Sink and enable CSE for ExtractElements.Nadav Rotem2013-07-123-4/+4
* Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.Charles Davis2013-07-122-0/+38
* llvm/test/Object/archive-toc.test: Use env(1) to satisfy win32 hosts.NAKAMURA Takumi2013-07-121-8/+4
* SLPVectorize: Replace the code that checks for vectorization candidates in su...Nadav Rotem2013-07-121-0/+74
* Add the ability to use guarded malloc when running llvm lit tests.David Dean2013-07-111-0/+20
* In response to dblaikie's comment on r186035, replacing theAdrian Prantl2013-07-111-136/+163
* Add tests for the before and after modifiers.Rafael Espindola2013-07-111-0/+20
* Add a test for llvm-ar's m operation.Rafael Espindola2013-07-111-0/+30
* PPC: Add some missing V_SET0 patternsHal Finkel2013-07-111-0/+18
* indvars: Improve LFTR by eliminating truncation when comparing against a cons...Andrew Trick2013-07-111-0/+25
* PPCDAGToDAGISel::isRunOfOnes should return false on zeroHal Finkel2013-07-111-0/+27
* Fix a FIXME about the format and add a test.Rafael Espindola2013-07-111-8/+23
* LoopVectorize: Vectorize all accesses in address space zero with unit strideArnold Schwaighofer2013-07-111-0/+61
* Merge these tests.Rafael Espindola2013-07-115-35/+16
* Use a more unique name to avoid conflicting with directory.ll tests when runningRafael Espindola2013-07-111-19/+19
* Add a test for llvm-ar's 'd' operation.Rafael Espindola2013-07-111-0/+30
* Add tests for the 'x' operation.Rafael Espindola2013-07-111-0/+20
* [SystemZ] Add testcase missing from r186073Richard Sandiford2013-07-111-0/+266
* [SystemZ] Use zeroing form of RISBG for shift-and-AND sequencesRichard Sandiford2013-07-111-2/+2
* [SystemZ] Use zeroing form of RISBG for some AND sequencesRichard Sandiford2013-07-1126-262/+376
* [SystemZ] Allow 8-bit operands to RISBGRichard Sandiford2013-07-113-12/+12