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* Rebuild RegScavenger::DistanceMap each time it is needed.Jakob Stoklund Olesen2009-08-111-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register scavenger maintains a DistanceMap that maps MI pointers to their distance from the top of the current MBB. The DistanceMap is built incrementally in forward() and in bulk in findFirstUse(). It is used by scavengeRegister() to determine which candidate register has the longest unused interval. Unfortunately the DistanceMap contents can become outdated. The first time scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If then instructions are inserted in the MBB (as they always are following scavengeRegister()), the recorded distances are too short. This causes bad behaviour in the included test case where a register use /after/ the current position is ignored because findFirstUse() thinks is is /before/ the current position. A "using an undefined register" assertion follows promptly. The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and discard it after use. This means that DistanceMap is no longer needed as a RegScavenger member variable, and forward() doesn't need to update it. The fix then discloses issue number two in the same test case: The candidate search in scavengeRegister() finds a CSR that has been saved in the prologue, but is currently unused. It would be both inefficient and wrong to spill such a register in the emergency spill slot. In the present case, the emergency slot restore is placed immediately before the normal epilogue restore, leading to a "Redefining a live register" assertion. Fix number two: When scavengerRegister() stumbles upon an unused register that is overwritten later in the MBB, return that register early. It is important to verify that the register is defined later in the MBB, otherwise it might be an unspilled CSR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more Neon tests to use FileCheck.Bob Wilson2009-08-112-16/+58
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78648 91177308-0d34-0410-b5e6-96231b3b80d8
* Use vAny type to get rid of Neon intrinsics that differed only in whetherBob Wilson2009-08-1119-164/+164
| | | | | | | | | | | | the overloaded vector types allowed floating-point or integer vector elements. Most of these operations actually depend on the element type, so bitcasting was not an option. If you include the vpadd intrinsics that I updated earlier, this gets rid of 20 intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).Daniel Dunbar2009-08-111-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78642 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Accept .word as a synonym for .shortDaniel Dunbar2009-08-111-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78641 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Sketch parsing for .file, .line, and .loc. No streamer hooks for theseDaniel Dunbar2009-08-113-0/+18
| | | | | | | yet (I'm not even sure what they do). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78639 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Fix darwin .section parsing. It was skipping the section name and a ','Daniel Dunbar2009-08-111-0/+4
| | | | | | | | (and outputting a diagnostic pointing at the wrong place), all of which lead to much confusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78637 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands.Daniel Dunbar2009-08-111-4/+17
| | | | | | | - This drops us to 123 ambiguous instructions (previously ~500) on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78636 91177308-0d34-0410-b5e6-96231b3b80d8
* Use new EVT::vAny type to combine Neon intrinsics for VPADD.Bob Wilson2009-08-111-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78632 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch ↵Evan Cheng2009-08-1026-80/+240
| | | | | | of thumb2 tests to FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78622 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the DAGCombiner's handling of multiple linkedDan Gohman2009-08-101-0/+24
| | | | | | | | | | | | MERGE_VALUES nodes. Replacing the result values with the operands in one MERGE_VALUES node may cause another MERGE_VALUES node be CSE'd with the first one, and bring its uses along, so that the first one isn't dead, as this code expects. Fix this by iterating until the node is really dead. This fixes PR4699. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78619 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FileCheck.David Goodwin2009-08-104-20/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78614 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FileCheck... its good for you...David Goodwin2009-08-102-10/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78613 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test.David Goodwin2009-08-101-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78611 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test.David Goodwin2009-08-101-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78606 91177308-0d34-0410-b5e6-96231b3b80d8
* Use NEON for single-precision int<->FP conversions.David Goodwin2009-08-104-0/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78604 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Disambiguate i64i8imm.Daniel Dunbar2009-08-101-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78598 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle the constantfp created during post-legalization dag combiner phase.Evan Cheng2009-08-101-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78594 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ocaml "make check" tests, that wasn't finding the proper c++ compiler.Erick Tryzelaar2009-08-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78592 91177308-0d34-0410-b5e6-96231b3b80d8
* Add nounwind keywords.Dan Gohman2009-08-102-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78568 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Check for matches with super classes when matchingDaniel Dunbar2009-08-101-1/+0
| | | | | | | instruction operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78565 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the big switch: Change MCSectionMachO to represent a section *semantically*Chris Lattner2009-08-105-48/+17
| | | | | | | | | | | | | | | | | | instead of syntactically as a string. This means that it keeps track of the segment, section, flags, etc directly and asmprints them in the right format. This also includes parsing and validation support for llvm-mc and "attribute(section)", so we should now start getting errors about invalid section attributes from the compiler instead of the assembler on darwin. Still todo: 1) Uniquing of darwin mcsections 2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h] 3) there are a few FIXMEs, for example what is the syntax to get the S_GB_ZEROFILL segment type? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable this test for now, we don't check for super classes when matching yet.Daniel Dunbar2009-08-091-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78531 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Implement user defined super classes.Daniel Dunbar2009-08-091-0/+14
| | | | | | | - We can now discriminate SUB32ri8 from SUB32ri, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
* Add tests for Neon VZIP and VUZP instructions.Bob Wilson2009-08-092-0/+234
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78529 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a test for Neon VTRN instructions.Bob Wilson2009-08-091-0/+117
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78528 91177308-0d34-0410-b5e6-96231b3b80d8
* sink the 'name' and 'isdirective' state out of MCSection into its derived ↵Chris Lattner2009-08-081-2/+2
| | | | | | | | | classes. This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
* remove nondeterminstic test.Chris Lattner2009-08-081-13/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78512 91177308-0d34-0410-b5e6-96231b3b80d8
* Add crc32 instruction and intrinsics. Add a new class of prefixEric Christopher2009-08-081-0/+38
| | | | | | | | | | bytes for F2 0F 38 and propagate. Add a FIXME for a set of possibilities which correspond to intrinsics already used. New test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for READCYCLECOUNTER in Blackfin back-end.Jakob Stoklund Olesen2009-08-081-5/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().Jakob Stoklund Olesen2009-08-081-2/+2
| | | | | | | | Blackfin supports and/or/xor on i32 but not on i16. Teach DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes after legalize ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify RegScavenger::forward a bit more.Jakob Stoklund Olesen2009-08-081-0/+20
| | | | | | | | | | | Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Improve match code.Daniel Dunbar2009-08-082-6/+0
| | | | | | | | | | | | | | | - This doesn't actually improve the algorithm (its still linear), but the generated (match) code is now fairly compact and table driven. Still need a generic string matcher. - The table still needs to be compressed, this is quite simple to do and should shrink it to under 16k. - This also simplifies and restructures the code to make the match classes more explicit, in anticipation of resolving ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another Strong-SIV testcase.Andreas Bolka2009-08-081-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78446 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not generate 32-bit call on win64 when imm does not fitAnton Korobeynikov2009-08-071-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
* rename testChris Lattner2009-08-071-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78441 91177308-0d34-0410-b5e6-96231b3b80d8
* merge a bunch of tests together into one, convert to filecheck whichChris Lattner2009-08-075-64/+60
| | | | | | | is more tolerant of whitespace differences. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78439 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more Neon tests to use FileCheck.Bob Wilson2009-08-079-40/+127
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78433 91177308-0d34-0410-b5e6-96231b3b80d8
* Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin2009-08-079-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
* Added Mac OS X assembler style conditional assembly. I may come back and see ifKevin Enderby2009-08-071-0/+12
| | | | | | | | | I can clean this up a bit more and do way with the TheCondState and just use the top element on the TheCondStack if not empty. Also may tweak the code around ParseConditionalAssemblyDirectives() to simplify the AsmParser code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78423 91177308-0d34-0410-b5e6-96231b3b80d8
* 2 more vdup.32 casesAnton Korobeynikov2009-08-071-1/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.Evan Cheng2009-08-071-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78410 91177308-0d34-0410-b5e6-96231b3b80d8
* XFAIL 2006-11-06-StackTrace.cpp on powerpc-apple-darwin9 until someone feelsDaniel Dunbar2009-08-071-2/+3
| | | | | | | motivated to fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78406 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix support to use NEON for single precision fp math.Evan Cheng2009-08-071-0/+80
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78397 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Strong-SIV testcase.Andreas Bolka2009-08-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78384 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory onDaniel Dunbar2009-08-072-0/+6
| | | | | | | | i386-apple-darwin9. This presumably will get fixed once the generated code improves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78379 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Move to a slightly more sane matching design.Daniel Dunbar2009-08-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Still not very sane, but a least its not 60k lines on X86. :) - In terms of correctness, currently some things are hard wired for X86, and we still don't properly resolve ambiguities (this is ignoring the instructions we don't even match due to funny .td stuff or other corner cases). The high level changes: 1. Represent tokens which are significant for matching explicitly as separate operands. This uniformly handles not only the instruction mnemonic, but also 'signficiant' syntax like the '*' in "call * ...". 2. Separate the matching of operands to an instruction from the construction of the MCInst. In theory this can be done during matching, but since the number of variations is small I think it makes sense to decompose the problems. 3. Improved a few of the mechanisms to at least successfully flatten / tokenize the assembly strings for PowerPC and ARM. 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm moving towards for handling ambiguous instructions. The high-bit is to infer a partial ordering of the operand classes (and force the user to specify one if we can't) and use that to resolve ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
* Another coalescer bug. When a dead copy is eliminated, transfer the kill to ↵Evan Cheng2009-08-071-0/+16
| | | | | | a def of the exact register rather than a super-register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78376 91177308-0d34-0410-b5e6-96231b3b80d8
* It turns out most of the thumb2 instructions are not allowed to touch SP. ↵Evan Cheng2009-08-072-3/+27
| | | | | | | | | | | The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing. This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time. This fixes PR4659 and PR4682. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78361 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the testcase from PR 4668. This works at theDale Johannesen2009-08-071-0/+26
| | | | | | | | moment, but it's a fragile area. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78358 91177308-0d34-0410-b5e6-96231b3b80d8
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