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* Add back a RUN line removed by mistake by a previous commitEli Bendersky2013-01-251-0/+1
* Add instruction encodings / disassembly support for l4r instructions.Richard Osborne2013-01-251-0/+11
* Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,Eli Bendersky2013-01-2541-45/+44
* Improve the !add TableGen test case.Hal Finkel2013-01-251-0/+3
* Add command-line flags for DWARF dumping.Eli Bendersky2013-01-251-0/+13
* Add instruction encodings / disassembly support for l5r instructions.Richard Osborne2013-01-251-0/+11
* [msan] Implement exact shadow propagation for relational ICmp.Evgeniy Stepanov2013-01-251-3/+31
* Add an addition operator to TableGenHal Finkel2013-01-251-0/+15
* Fixed the condition codes for the atomic64 min/umin code generation on ARM. I...Silviu Baranga2013-01-251-2/+2
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-251-3/+0
* Switch this code away from Value::isUsedInBasicBlock. That code eitherChandler Carruth2013-01-251-0/+63
* MISched: Add SchedDFSResult to ScheduleDAGMI to formalize theAndrew Trick2013-01-251-0/+3
* This patch implements parsing the .wordJack Carter2013-01-251-1/+4
* [mips] Set flag neverHasSideEffects flag on some of the floating point instru...Akira Hatanaka2013-01-251-0/+13
* Reapply chandlerc's r173342 now that the miscompile it was triggering is fixed.Benjamin Kramer2013-01-241-0/+29
* ConstantFolding: Add a missing folding that leads to a miscompile.Benjamin Kramer2013-01-242-1/+37
* Revert r173342 temporarily. It appears to cause a very late miscompileChandler Carruth2013-01-241-29/+0
* Plug TTI into the speculation logic, giving it a real cost interfaceChandler Carruth2013-01-241-0/+29
* Address a large chunk of this FIXME by accumulating the cost forChandler Carruth2013-01-241-0/+42
* Switch the constant expression speculation cost evaluation away fromChandler Carruth2013-01-241-0/+22
* [asan] adaptive redzones for globals (the larger the global the larger is the...Kostya Serebryany2013-01-241-0/+57
* The next phase of Mips16 hard float implementation.Reed Kotler2013-01-241-0/+256
* ConstantFolding: Evaluate GEP indices in the index type.Benjamin Kramer2013-01-231-3/+22
* Add instruction encodings / disassembly support for l6r instructions.Richard Osborne2013-01-231-0/+5
* Revert "InstCombine: Clean up weird code that talks about a modulus that's lo...Benjamin Kramer2013-01-231-0/+16
* Add the heuristic to differentiate SSPStrong from SSPRequired.Bill Wendling2013-01-231-12/+2518
* Add the IR attribute 'sspstrong'.Bill Wendling2013-01-232-21/+783
* Add support for reverse pointer induction variables. These are loops that con...Nadav Rotem2013-01-233-0/+195
* Add instruction encodings / disassembly support for u10 / lu10 instructions.Richard Osborne2013-01-221-0/+14
* Fix an issue of pseudo atomic instruction DAG scheduleMichael Liao2013-01-221-0/+110
* Add a warning when there is a macro defintion that has named parameters butKevin Enderby2013-01-221-0/+14
* [mips] Implement MipsRegisterInfo::getRegPressureLimit.Akira Hatanaka2013-01-223-7/+7
* Have the integrated assembler give an error if $1 is used as an identifier inKevin Enderby2013-01-221-0/+5
* Add forgotten test case for the x32 commitEli Bendersky2013-01-221-0/+24
* X86: Make sure we account for the FMA4 register immediate value, otherwise ri...Benjamin Kramer2013-01-221-0/+61
* Tests: rewrite 'opt ... %s' to 'opt ... < %s' so that opt does not emit a Mod...Dmitri Gribenko2013-01-221-1/+1
* [msan] Do not insert check on volatile store.Evgeniy Stepanov2013-01-221-0/+14
* This test is only supposed to test that the objc-arc alias analysisMichael Gottesman2013-01-221-1/+1
* [MC/Mach-O] Load commands are supposed to 8-byte aligned on 64-bit.Daniel Dunbar2013-01-221-1/+9
* Remove target triple from an LSR test.Andrew Trick2013-01-221-1/+0
* Transform (sub 0, (zext bool to A)) to (sext bool to A) andPaul Redmond2013-01-213-4/+12
* Add instruction encodings / disassembly support for u6 / lu6 instructions.Richard Osborne2013-01-211-0/+50
* Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne2013-01-211-0/+80
* Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne2013-01-201-0/+11
* Add instruction encodings / disassembly support for l3r instructions.Richard Osborne2013-01-201-0/+44
* Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne2013-01-201-0/+23
* Add instruction encodings / disassembly support 3r instructions.Richard Osborne2013-01-201-0/+38
* llvm/test/CodeGen/X86/win_ftol2.ll: Add -cpu=generic to appease valgrind.NAKAMURA Takumi2013-01-201-1/+1
* Revert 172708.Nadav Rotem2013-01-202-68/+0
* LoopVectorizer: Implement a new heuristics for selecting the unroll factor.Nadav Rotem2013-01-201-0/+71