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* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-0/+44
| | | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen2010-04-211-2/+5
| | | | | | | | | before reglist were not properly handled with respect to IT Block. Fix that by creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those instructions for disassembly. Add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101974 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement (but don't enable) PR6724 and rdar://6295824. In short,Chris Lattner2010-04-211-0/+23
| | | | | | | | | | | | | | | | | we have RefreshCallGraph detect when a function pass devirtualizes a call, and have CGSCCPassMgr iterate (up to a count) when this happens. This allows (in the example) GVN to devirtualize the call in foo, then the inliner to inline it away. This is not currently enabled because I haven't done any analysis on the (potentially substantial) code size or performance impact of doing this, and guess what, it exposes callgraph updating bugs in various passes. This is progress though, and you can play with it by passing -max-cg-scc-iterations=5 to opt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101973 91177308-0d34-0410-b5e6-96231b3b80d8
* - Clean up some crappy code which deals with coalescing of copies which look atEvan Cheng2010-04-214-5/+9
| | | | | | | | extract_subreg / insert_subreg, etc. - Add support for more aggressive insert_subreg coalescing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r101471. For tight recursive functions which have multipleDan Gohman2010-04-211-29/+0
| | | | | | | | | | recursive callsites, inlining can reduce the number of calls by exponential factors, as it does in MultiSource/Benchmarks/Olden/treeadd. More involved heuristics will be needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101969 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another variant of this test which found a place whereDan Gohman2010-04-211-0/+43
| | | | | | | | CodeGen's ComputeMaskedBits was being over-conservative when computing bits for an ADD. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101963 91177308-0d34-0410-b5e6-96231b3b80d8
* teach the x86 address matching stuff to handleChris Lattner2010-04-201-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (shl (or x,c), 3) the same as (shl (add x, c), 3) when x doesn't have any bits from c set. This finishes off PR1135. Before we compiled the block to: to: LBB0_3: ## %bb cmpb $4, %dl sete %dl addb %dl, %cl movb %cl, %dl shlb $2, %dl addb %r8b, %dl shlb $2, %dl movzbl %dl, %edx movl %esi, (%rdi,%rdx,4) leaq 2(%rdx), %r9 movl %esi, (%rdi,%r9,4) leaq 1(%rdx), %r9 movl %esi, (%rdi,%r9,4) addq $3, %rdx movl %esi, (%rdi,%rdx,4) incb %r8b decb %al movb %r8b, %dl jne LBB0_1 Now we produce: LBB0_3: ## %bb cmpb $4, %dl sete %dl addb %dl, %cl movb %cl, %dl shlb $2, %dl addb %r8b, %dl shlb $2, %dl movzbl %dl, %edx movl %esi, (%rdi,%rdx,4) movl %esi, 8(%rdi,%rdx,4) movl %esi, 4(%rdi,%rdx,4) movl %esi, 12(%rdi,%rdx,4) incb %r8b decb %al movb %r8b, %dl jne LBB0_1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101958 91177308-0d34-0410-b5e6-96231b3b80d8
* When doing Thumb disassembly, there's no need to consider ↵Johnny Chen2010-04-201-0/+3
| | | | | | | | | t2ADDrSPi12/t2SUBrSPi12, as their generic counterparts t2ADDri12/t2SUBri12 should suffice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CodeGen/X86/2010-04-19-DAGCombineCrash.ll into CodeGen/X86/crash.ll. AlsoBill Wendling2010-04-202-58/+21
| | | | | | | reduce. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101925 91177308-0d34-0410-b5e6-96231b3b80d8
* For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if ↵Johnny Chen2010-04-201-0/+3
| | | | | | | | | | | Rn(Inst{19-16})=='1111', transform the Opcode to the corresponding t2LDR*pci counterpart. Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101915 91177308-0d34-0410-b5e6-96231b3b80d8
* Add RUN:Devang Patel2010-04-201-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101913 91177308-0d34-0410-b5e6-96231b3b80d8
* Bill's change in r95336 broke empty aggregates embeddedChris Lattner2010-04-201-1/+10
| | | | | | | | | | | | | | in other types. fix this by only bumping zero-byte globals up to a single byte if the *entire global* is zero size, fixing PR6340. This also fixes empty arrays etc to be handled correctly, and only does this on subsection-via-symbols targets (aka darwin) which is the only place where this matters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101879 91177308-0d34-0410-b5e6-96231b3b80d8
* teach cellspu how to return i8 and i16 from calls,Chris Lattner2010-04-201-0/+8
| | | | | | | patch by Kalle Raiskila! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101875 91177308-0d34-0410-b5e6-96231b3b80d8
* RewriteLoopBodyWithConditionConstant can end up rewriting theChris Lattner2010-04-201-0/+19
| | | | | | | | | condition we're unswitching on. In this case, don't try to simplify the second copy of the loop which may be dead or not, but is probably a constant now. This fixes PR6879 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101870 91177308-0d34-0410-b5e6-96231b3b80d8
* reapply 'reject forward references to functions whose type don't match'Chris Lattner2010-04-201-1/+1
| | | | | | | now that the testsuite has been updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101866 91177308-0d34-0410-b5e6-96231b3b80d8
* The visitXOR method can return the same SDNode. If so, we don't want to deleteBill Wendling2010-04-201-0/+58
| | | | | | | it as it's not dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101855 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the palignr intrinsics now that we lower them to vector shuffles,Eric Christopher2010-04-202-0/+1
| | | | | | | | | shifts and null vectors. Autoupgrade these to what we'd lower them to. Add a testcase to exercise this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101851 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix rdar://7879828 - crash in CallGraph, a self host issue.Chris Lattner2010-04-201-0/+38
| | | | | | | | | Arg promotion was deleting call graph nodes that still had references from the 'indirect' CGN. Like the inliner, it should only delete the function if all references are gone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101845 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix tests for Neon load/store intrinsics to match the i8* types expected byBob Wilson2010-04-2010-94/+188
| | | | | | | | | | | the intrinsics. The reason for those i8* types is that the intrinsics are overloaded on the vector type and we don't have a way to declare an intrinsic where one argument is an overloaded vector type and another argument is a pointer to the vector element type. The bitcasts added here will match what the frontend will typically generate when these intrinsics are used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101840 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the Expr member from IVUsers. Instead of remembering the expression,Dan Gohman2010-04-191-0/+24
| | | | | | | | just ask ScalarEvolution for it on demand. This helps IVUsers be more robust in the case of expressions changing underneath it. This fixes PR6862. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101819 91177308-0d34-0410-b5e6-96231b3b80d8
* According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen2010-04-191-0/+3
| | | | | | | | | | | Pseudocode details of conditional, Condition bits '111x' indicate the instruction is always executed. That is, '1111' is a leagl condition field value, which is now mapped to ARMCC::AL. Also add a test case for condition field '1111'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101817 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo. add a test case.Devang Patel2010-04-191-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101812 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen2010-04-191-0/+4
| | | | | | | VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101784 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix declarations in a few more tests.Nick Lewycky2010-04-174-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101676 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "reject forward references to functions whose type don't match", ↵Daniel Dunbar2010-04-171-1/+1
| | | | | | because DJG told me to! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101675 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix intrinsic signature in this test.Nick Lewycky2010-04-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101674 91177308-0d34-0410-b5e6-96231b3b80d8
* reject forward references to functions whose type don't matchChris Lattner2010-04-171-1/+1
| | | | | | | up with the definition (and fix a broken testcase). PR6491. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101670 91177308-0d34-0410-b5e6-96231b3b80d8
* doh, didn't mean to check in my hackaround lit sucking. :)Chris Lattner2010-04-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101663 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR6332, allowing an index of zero into a zero sized array Chris Lattner2010-04-171-0/+8
| | | | | | | even if the element of the array has no size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101662 91177308-0d34-0410-b5e6-96231b3b80d8
* teach the x86 asm parser how to handle segment prefixesChris Lattner2010-04-172-2/+4
| | | | | | | in memory operands. rdar://7874844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for r101538, patch by Nico Schmidt!Chris Lattner2010-04-171-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101642 91177308-0d34-0410-b5e6-96231b3b80d8
* Start function numbering at 0.Dan Gohman2010-04-1734-646/+646
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
* a bunch of ssse3 instructions are misencoded to think they have an Chris Lattner2010-04-171-0/+7
| | | | | | | i8 field when they really do not. This fixes rdar://7840289 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
* Add nounwind.Evan Cheng2010-04-171-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101613 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit my previous SSAUpdater changes. The previous version naively triedBob Wilson2010-04-171-0/+46
| | | | | | | | | | | | to determine where to place PHIs by iteratively comparing reaching definitions at each block. That was just plain wrong. This version now computes the dominator tree within the subset of the CFG where PHIs may need to be placed, and then places the PHIs in the iterated dominance frontier of each definition. The rest of the patch is mostly the same, with a few more performance improvements added in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101612 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.Johnny Chen2010-04-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101559 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-161-0/+3
| | | | | | | | | | | case. Also, the 0xFF hex literal involved in the shift for ESize64 should be suffixed "ul" to preserve the shift result. Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
* In the same spirit of r101524, which removed the assert() from ↵Johnny Chen2010-04-161-0/+3
| | | | | | | | | printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-161-0/+3
| | | | | | | | | | to the UAL syntax of LDCL<c>, instead. Add a test case for this change which also tests the removal of assert() from printAddrMode2OffsetOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101527 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r101455, which fails on the llvm-arm-linux buildbot.Dan Gohman2010-04-161-41/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101515 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable inlining of recursive calls. It can complicate tailcallelim andDan Gohman2010-04-161-0/+29
| | | | | | | | dependent analyses, and increase code size, so doing it profitably would require more complex heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101471 91177308-0d34-0410-b5e6-96231b3b80d8
* Refine the detection of seemingly infinitely recursive calls where theDan Gohman2010-04-161-1/+25
| | | | | | | | callee is expected to be expanded to something else by codegen, so that normal infinitely recursive calls are still transformed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101468 91177308-0d34-0410-b5e6-96231b3b80d8
* Add JIT exception handling test.Bill Wendling2010-04-161-0/+41
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101455 91177308-0d34-0410-b5e6-96231b3b80d8
* move comment.Chris Lattner2010-04-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101433 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR6832: we were using the alignment of a pointer when we Chris Lattner2010-04-161-0/+32
| | | | | | | wanted the alignment of the pointee. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101432 91177308-0d34-0410-b5e6-96231b3b80d8
* Added another test case for am3offset operand, testing Rn, #+/-imm8.Johnny Chen2010-04-151-0/+3
| | | | | | | Previous checkin tested Rn, #+/-Rm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101418 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for machine-sink on critical edgesJakob Stoklund Olesen2010-04-151-0/+58
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101416 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-0/+3
| | | | | | | am2offset. Modified the instruction table entry and added a new test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8
* Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng2010-04-151-8/+8
| | | | | | is doing the right thing and codegen looks correct for both Thumb and Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101410 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR6847. RegScavenger should ignore DebugValues.Jakob Stoklund Olesen2010-04-151-0/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101392 91177308-0d34-0410-b5e6-96231b3b80d8
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