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* instcombine: Migrate stpcpy optimizationsMeador Inge2012-10-314-46/+71
| | | | | | | | This patch migrates the stpcpy optimizations from the simplify-libcalls pass into the instcombine library call simplifier. Note that the __stpcpy_chk simplifications were migrated in a previous commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167083 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Split out the __stpcpy_chk simplifications from StrCpyChkOptMeador Inge2012-10-312-0/+117
| | | | | | | | | | | | | | | | r166198 migrated the strcpy optimization to instcombine. The strcpy simplifier that was migrated from Transforms/Scalar/SimplifyLibCalls.cpp was also doing some __strcpy_chk simplifications. Those fortified simplifications were migrated as well, but introduced a bug in the __stpcpy_chk simplifier in the process. This happened because the __strcpy_chk and __stpcpy_chk simplifiers were both mapped to StrCpyChkOpt which was updated with simplifications that worked for __strcpy_chk, but not __stpcpy_chk. This patch fixes the problem by adding proper test coverage and creating a new simplifier for __stpcpy_chk (instead of sharing one with __strcpy_chk). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167082 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 SSE: update rsqrtss and rcpss to use two source operands andManman Ren2012-10-301-0/+36
| | | | | | | | | | | | | the first source operand is tied to the destination operand. This is to accurately model the corresponding instructions where the upper bits are unmodified. rdar://12558838 PR14221 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167064 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 MMX: optimize transfer from mmx to i32Manman Ren2012-10-301-0/+14
| | | | | | | | | | We used to generate a store (movq) + a load. Now we use movd. rdar://9946746 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167056 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR14212: For some strange reason I treated vectors differently fromChandler Carruth2012-10-301-0/+15
| | | | | | | | | integers in that the code to handle split alloca-wide integer loads or stores doesn't come first. It should, for the same reasons as with integers, and the PR attests to that. Also had to fix a busted assert in that this test case also covers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167051 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka2012-10-301-1/+65
| | | | | | | | use the caller's stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Fix a serious missed optimization: we only turned top-level loops ↵Benjamin Kramer2012-10-301-0/+42
| | | | | | | | into memmove. Thanks to Preston Briggs for catching this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167045 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Fix a small bug introduced in r167042.Hal Finkel2012-10-301-0/+28
| | | | | | | We need to make sure that we take the correct load/store alignment when the inputs are flipped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167044 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorize: Add support for write-only loops when the write destination ↵Nadav Rotem2012-10-301-0/+26
| | | | | | | | | | is a single pointer. Speedup SciMark by 1% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167035 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC: Expand FSRQT for vector typesAdhemerval Zanella2012-10-301-0/+71
| | | | | | | | | This patch expands FSQRT for floating point vector types when altivec is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167034 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorize: Fix a bug in the initialization of reduction variables. AND ↵Nadav Rotem2012-10-301-0/+1
| | | | | | | | | | needs to start at all-one while XOR, and OR need to start at zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167032 91177308-0d34-0410-b5e6-96231b3b80d8
* Set %defaultjit to use MCJIT for PowerPC targets.Ulrich Weigand2012-10-302-2/+3
| | | | | | | | Update Transforms/LICM/2003-12-11-SinkingToPHI.ll test to use %defaultjit as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167031 91177308-0d34-0410-b5e6-96231b3b80d8
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-303-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167020 91177308-0d34-0410-b5e6-96231b3b80d8
* switch_to_lookup_table.ll: Remove some unnecessary lines, comments,Hans Wennborg2012-10-301-625/+214
| | | | | | function attributes, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167016 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC: More support for Altivec compare operationsAdhemerval Zanella2012-10-301-14/+350
| | | | | | | | | | This patch adds more support for vector type comparisons using altivec. It adds correct support for v16i8, v8i16, v4i32, and v4f32 vector types for comparison operators ==, !=, >, >=, <, and <=. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167015 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable some additional constant folding for PPCDoubleDouble.Ulrich Weigand2012-10-301-2/+1
| | | | | | | This fixes Clang :: CodeGen/complex-builtints.c on PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167013 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg2012-10-303-84/+38
| | | | | | | | | | | | | | When the switch-to-lookup tables transform landed in SimplifyCFG, it was pointed out that this could be inappropriate for some targets. Since there was no way at the time for the pass to know anything about the target, an awkward reverse-transform was added in CodeGenPrepare that turned lookup tables back into switches for some targets. This patch uses the new TargetTransformInfo to determine if a switch should be transformed, and removes CodeGenPrepare::ConvertLoadToSwitch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167011 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an invalid assert in TargetTransformImplHal Finkel2012-10-301-0/+12
| | | | | | | getCastInstrCost had an assert prohibiting scalar to vector casts. Such casts, however, are allowed. This should make the vectorizer buildbot happier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166998 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-305-7/+9
| | | | | | | | | When the operand is a plain immediate rather than a label, print it as [pc, #imm] like we do for the Thumb2 wide encoding variant. rdar://12154503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
* Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler2012-10-302-3/+3
| | | | | | | | | | We will make them delay slot forms if there is something that can be placed in the delay slot during a separate pass. Mips16 extended instructions cannot be placed in delay slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166990 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak2012-10-301-5/+9
| | | | | | | to test it with chapni's fix (-mattr=+avx). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166985 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-292-0/+15
| | | | | | | | is 24 bits not 20 and the decoding needed to correctly handle converting the J1 and J2 bits to their I1 and I2 values to reconstruct the displacement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166982 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak2012-10-291-9/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166979 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/vec_shuffle-30.ll: Try to unbreak builds - assuming +avx.NAKAMURA Takumi2012-10-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166974 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak2012-10-291-5/+9
| | | | | | | | | | | | | | | | | | | | %0 = load <8 x i16>* %dest %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14> store <8 x i16> %1, <8 x i16>* %dest We get: vmovlpd (%eax), %xmm0, %xmm0 instead of: vmovaps (%eax), %xmm1 vmovsd %xmm1, %xmm0, %xmm0 No extra test-case is added. I just fixed the existing one (also it uses FileCheck now). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166971 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt2012-10-291-0/+23
| | | | | | | | | | | | | | | | | | | ELF ABI. A varargs parameter consisting of a single-precision floating-point value, or of a single-element aggregate containing a single-precision floating-point value, must be passed in the low-order (rightmost) four bytes of the doubleword stack slot reserved for that parameter. If there are GPR protocol registers remaining, the parameter must also be mirrored in the low-order four bytes of the reserved GPR. Prior to this patch, such parameters were being passed in the high-order four bytes of the stack slot and the mirrored GPR. The patch adds a new test case to verify the correct code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166968 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement patterns for extloadi8 and extloadi16Reed Kotler2012-10-291-0/+69
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166960 91177308-0d34-0410-b5e6-96231b3b80d8
* In various places throughout the code generator, there were specialUlrich Weigand2012-10-291-1/+2
| | | | | | | | | | checks to avoid performing compile-time arithmetic on PPCDoubleDouble. Now that APFloat supports arithmetic on PPCDoubleDouble, those checks are no longer needed, and we can treat the type like any other. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166958 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove redundant test case from r166949, per Eli's suggestion.Chad Rosier2012-10-291-107/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166953 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier2012-10-292-0/+157
| | | | | | | equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166949 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR14204Michael Liao2012-10-291-0/+15
| | | | | | | | - Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166947 91177308-0d34-0410-b5e6-96231b3b80d8
* Completely disallow partial copies in adjustCopiesBackFrom().Jakob Stoklund Olesen2012-10-291-0/+28
| | | | | | | | | | | | Partial copies can show up even when CoalescerPair.isPartial() returns false. For example: %vreg24:dsub_0<def> = COPY %vreg31:dsub_0; QPR:%vreg24,%vreg31 Such a partial-partial copy is not good enough for the transformation adjustCopiesBackFrom() needs to do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166944 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow i32/i64 for 'f' constraint on PowerPC.Ulrich Weigand2012-10-291-0/+14
| | | | | | | This fixes PR12757. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166943 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand all atomic ops for mips16.Reed Kotler2012-10-291-0/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166935 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch addresses a problem with the Post RA scheduler generating anPreston Gurd2012-10-291-0/+13
| | | | | | | | | | | | | | | | | incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could access memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses. This should fix PR13504. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166929 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch adds alignment information for long double to the 64-bit PowerPCBill Schmidt2012-10-291-0/+26
| | | | | | | | | | | | | | | | | | ELF subtarget. The existing logic is used as a fallback to avoid any changes to the Darwin ABI. PPC64 ELF now has two possible data layout strings: one for FreeBSD, which requires 8-byte alignment, and a default string that requires 16-byte alignment. I've added a test for PPC64 Linux to verify the 16-byte alignment. If somebody wants to add a separate test for FreeBSD, that would be great. Note that there is a companion patch to update the alignment information in Clang, which I am committing now as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166928 91177308-0d34-0410-b5e6-96231b3b80d8
* Align the data section correctly when loading an ELF file.Tim Northover2012-10-291-0/+15
| | | | | | Patch by Amara Emerson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166920 91177308-0d34-0410-b5e6-96231b3b80d8
* Make use of common-symbol alignment info in ELF loader.Tim Northover2012-10-291-0/+32
| | | | | | Patch by Amara Emerson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166919 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -alias and -ralias options to match what we have for functions andRafael Espindola2012-10-291-0/+9
| | | | | | globals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166909 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-extract changes linkages so that functions on both sides of theRafael Espindola2012-10-292-4/+28
| | | | | | | split module can see each other. If it is keeping a symbol that already has a non local linkage, it doesn't need to change it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166908 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-extract was unable to handle aliases. It would leave a copy on theRafael Espindola2012-10-291-0/+40
| | | | | | | | | | | | | | | | | | output of both llvm-extract foo.ll -func=bar and llvm-extract foo.ll -func=bar -delete so the two new files could not be linked together anymore. With this change alias are handled almost like functions and global variables. Almost because with alias we cannot just clear the initializer/body, we have to create a new declaration and replace the alias with it. The net result is that now the output of the above commands can be linked even if foo.ll has aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166907 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement brind operator for mips16.Reed Kotler2012-10-281-0/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166903 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch is for the implementation of mips16 complex pattern addr16.Reed Kotler2012-10-282-0/+133
| | | | | | | | | | | | | | | | | | | | | | | Previously mips16 was sharing the pattern addr which is used for mips32 and mips64. This had a number of problems: 1) Storing and loading byte and halfword quantities for mips16 has particular problems due to the primarily non mips16 nature of SP. When we must load/store byte/halfword stack objects in a function, we must create a mips16 alias register for SP. This functionality is tested in stchar.ll. 2) We need to have an FP register under certain conditions (such as dynamically sized alloca). We use mips16 register S0 for this purpose. In this case, we also use this register when accessing frame objects so this issue also affects the complex pattern addr16. This functionality is tested in alloca16.ll. The Mips16InstrInfo.td has been updated to use addr16 instead of addr. The complex pattern C++ function for addr has been copied to addr16 and updated to reflect the above issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166897 91177308-0d34-0410-b5e6-96231b3b80d8
* Never attempt to join an early-clobber def with a regular kill.Jakob Stoklund Olesen2012-10-271-0/+9
| | | | | | This fixes PR14194. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166880 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Add checks to avoid turning memmove into an infinite loop.Benjamin Kramer2012-10-271-1/+52
| | | | | | I don't think this is possible with the current implementation but that may change eventually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166877 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Recognize memmove loops.Benjamin Kramer2012-10-271-0/+22
| | | | | | | | | | | This turns loops like for (unsigned i = 0; i != n; ++i) p[i] = p[i+1]; into memmove, which has a highly optimized implementation in most libcs. This was really easy with the new DependenceAnalysis :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166875 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopIdiom: Replace custom dependence analysis with DependenceAnalysis.Benjamin Kramer2012-10-272-0/+102
| | | | | | | | | | | Requires a lot less code and complexity on loop-idiom's side and the more precise analysis can catch more cases, like the one I included as a test case. This also fixes the edge-case miscompilation from PR9481. Compile time performance seems to be slightly worse, but this is mostly due to an extra LCSSA run scheduled by the PassManager and should be fixed there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166874 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. Fix a bug in getTypeConversion. When a *simple* type is split, we need to ↵Nadav Rotem2012-10-271-0/+62
| | | | | | | | | | | return the type of the split result. 2. Change the maximum vectorization width from 4 to 8. 3. A test for both. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166864 91177308-0d34-0410-b5e6-96231b3b80d8
* [code size][ARM] Emit regular call instructions instead of the move, branch ↵Quentin Colombet2012-10-271-0/+34
| | | | | | sequence git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166854 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsHi for mips16Reed Kotler2012-10-271-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166852 91177308-0d34-0410-b5e6-96231b3b80d8
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