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* Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen2010-03-1714-22/+22
| | | | | | | | | | | | | instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase for r98728.Stuart Hastings2010-03-171-0/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98744 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix liveintervals handling of dbg_value instructions.Evan Cheng2010-03-161-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98686 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r98666 too; it's checkin-without-testing day!Daniel Dunbar2010-03-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98673 91177308-0d34-0410-b5e6-96231b3b80d8
* temporarily xfailChris Lattner2010-03-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98666 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an rdar number to this test.Dan Gohman2010-03-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98654 91177308-0d34-0410-b5e6-96231b3b80d8
* Chris pointed out that producing undef here is wrong inDuncan Sands2010-03-161-11/+0
| | | | | | | general. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98649 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-1614-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-1614-22/+22
| | | | | | | | | | | | | | | | | | | (RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson2010-03-167-8/+8
| | | | | | | | This does not move entirely to UAL syntax, since the default "increment after" suffix is empty but we still use "IA" for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98635 91177308-0d34-0410-b5e6-96231b3b80d8
* Check that P is not zero initialized.Duncan Sands2010-03-161-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98627 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a testcase for the change in r98586.Bob Wilson2010-03-161-0/+63
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98610 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot testcase for r98599.Bill Wendling2010-03-161-0/+60
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98602 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the third (and last known) case of code update problems due Chris Lattner2010-03-161-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | to LLVM IR changes with addr label weirdness. In the testcase, we generate references to the two bb's when codegen'ing the first function: _test1: ## @test1 leaq Ltmp0(%rip), %rax .. leaq Ltmp1(%rip), %rax Then continue to codegen the second function where the blocks get merged. We're now smart enough to emit both labels, producing this code: _test_fun: ## @test_fun ## BB#0: ## %entry Ltmp1: ## Block address taken Ltmp0: ## BB#1: ## %ret movl $-1, %eax ret Rejoice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98595 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.Daniel Dunbar2010-03-151-1/+1
| | | | | | | - Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue. - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98592 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize code for doing vector gather/scatter index calculations withDan Gohman2010-03-151-0/+39
| | | | | | | | | 32-bit indices. Instead of shuffling each element out of the index vector, when all indices are needed, just store the input vector to the stack and load the elements out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98588 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and ↵Daniel Dunbar2010-03-152-0/+2039
| | | | | | external relocations, but we don't have x86_64 relocations yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98583 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for the case when a reference to a addr-of-bb Chris Lattner2010-03-152-23/+39
| | | | | | | | | | | label is generated, but then the block is deleted. Since the value is undefined, we just emit the label right after the entry label of the function. It might matter that the label is in the same section as the function was afterall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98579 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the case when a reference to an address taken BB is emitted in oneChris Lattner2010-03-151-0/+25
| | | | | | | | | function, then the BB is RAUW'd before the definition is emitted. There are still two cases not being handled, but this should improve us back to the situation before I touched anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98566 91177308-0d34-0410-b5e6-96231b3b80d8
* filecheckize a test and mark these wiht a cpu so it passesChris Lattner2010-03-143-6/+13
| | | | | | | on hosts without cmovs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98521 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodesDuncan Sands2010-03-141-0/+7
| | | | | | | | with ppc_f128 type by having the type legalizer turn these back into a call to copysignl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
* fix ShrinkDemandedOps to not leave dead nodes around,Chris Lattner2010-03-141-0/+19
| | | | | | | fixing PR6607 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98512 91177308-0d34-0410-b5e6-96231b3b80d8
* don't have i386-specific tests in CodeGen/Generic, PR6601.Chris Lattner2010-03-1422-30/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98508 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), notChris Lattner2010-03-141-1/+25
| | | | | | | the operand type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98507 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typoAnton Korobeynikov2010-03-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98506 91177308-0d34-0410-b5e6-96231b3b80d8
* Feature test for half precision FP.Anton Korobeynikov2010-03-141-0/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98504 91177308-0d34-0410-b5e6-96231b3b80d8
* fix AsmPrinter::GetBlockAddressSymbol to always return a uniqueChris Lattner2010-03-143-8/+8
| | | | | | | | label instead of trying to form one based on the BB name (which causes collisions if the name is empty). This fixes PR6608 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
* get MMI out of the label uniquing business, just go to MCContextChris Lattner2010-03-143-4/+4
| | | | | | | to get unique assembler temporary labels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
* xfail properlyChris Lattner2010-03-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98479 91177308-0d34-0410-b5e6-96231b3b80d8
* xfail these tests temporarily to get teh buildbots back to happy land.Chris Lattner2010-03-144-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98476 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not force indirect tailcall through fixed registers: eax, r11. Add ↵Evan Cheng2010-03-142-5/+5
| | | | | | support to allow loads to be folded to tail call instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98465 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Fix ADD64i32 encoding.Daniel Dunbar2010-03-131-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98457 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86_64: Symbol support.Daniel Dunbar2010-03-132-146/+299
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98456 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Initial x86_64 support.Daniel Dunbar2010-03-132-7/+564
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98454 91177308-0d34-0410-b5e6-96231b3b80d8
* macho-dump: Basic Mach 64 support.Daniel Dunbar2010-03-131-19/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98453 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86_64: Fix matching of leaq.Daniel Dunbar2010-03-131-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98444 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86_64: Fix matching of callq.Daniel Dunbar2010-03-131-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98443 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: PCrel relocations weren't using the right base address, they areDaniel Dunbar2010-03-131-0/+14
| | | | | | | relative to the fragment address, not its offset. This was masked by the text section normally being at address 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98420 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo in ValueTracking that's causing instcombine to delete needed ↵Evan Cheng2010-03-131-0/+20
| | | | | | shift instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98416 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testingDaniel Dunbar2010-03-131-0/+3
| | | | | | other functionality on 403.gcc compiled at -O0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Add an XFAIL test where we aren't matching the correct instructionDaniel Dunbar2010-03-131-0/+8
| | | | | | | because we don't understand how the specific instruction is doing sign extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98404 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Implement initial support for relaxation.Daniel Dunbar2010-03-122-0/+68
| | | | | | | | | | | | - The implementation is currently very brain dead and inefficient, but I have a clear plan on how to fix it. - The good news is, it works and correctly assembles 403.gcc (when built with Clang, at '-Os', '-Os -g', and '-O3'). Even better, at '-Os' and '-Os -g', the resulting binary is exactly equivalent to that when built with the system assembler. So it probably works! :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98396 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix llc crash on invalid input.Devang Patel2010-03-121-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98369 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify code to use OutContext.GetOrCreateTemporarySymbol withChris Lattner2010-03-121-8/+8
| | | | | | | | no arguments instead of having to come up with a unique name. This also makes the code less fragile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98364 91177308-0d34-0410-b5e6-96231b3b80d8
* When constant folding GEP of GEP, do not crash if an index ofDuncan Sands2010-03-121-0/+13
| | | | | | | the inner GEP is not a ConstantInt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98359 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR6577, a bug in sdbuilder lowering select instructionsChris Lattner2010-03-121-0/+14
| | | | | | | whose true value was not Val#0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98336 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r98270.Bill Wendling2010-03-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98281 91177308-0d34-0410-b5e6-96231b3b80d8
* Bad bad bug. x86 force indirect tail call address into eax when it's meant ↵Evan Cheng2010-03-111-1/+1
| | | | | | to force it into a call preserved register instead. Change it to ecx for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98270 91177308-0d34-0410-b5e6-96231b3b80d8
* Add dag combine to simplify lmul(x, 0, a, b)Richard Osborne2010-03-111-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98258 91177308-0d34-0410-b5e6-96231b3b80d8
* The check for coalescing a virtual register to a physical register, e.g.Evan Cheng2010-03-111-0/+35
| | | | | | | | | | cl = EXTRACT_SUBREG reg1024, 1, is overly conservative. It should check for overlaps of vr's live interval with the super registers of the physical register (ECX in this case) and let JoinIntervals() handle checking the coalescing feasibility against the physical register (cl in this case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98251 91177308-0d34-0410-b5e6-96231b3b80d8
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