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* Merge with LLVM upstream r155090.Shih-wei Liao2012-04-241-26/+6
|\ | | | | | | | | | | | | Conflicts: lib/Support/Unix/PathV2.inc Change-Id: I7b89833849f6cbcfa958a33a971d0f7754c9cb2c
| * Move the JIT flags from llc to lli. These flags showed up as part of movingNick Lewycky2012-04-181-26/+0
| | | | | | | | | | | | | | backend flags in TargetOptions.h into their own class in r145714. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154993 91177308-0d34-0410-b5e6-96231b3b80d8
| * Teach LLVM about a PIE option which, when enabled on top of PIC, makesChandler Carruth2012-04-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | optimizations which are valid for position independent code being linked into a single executable, but not for such code being linked into a shared library. I discussed the design of this with Eric Christopher, and the decision was to support an optional bit rather than a completely separate relocation model. Fundamentally, this is still PIC relocation, its just that certain optimizations are only valid under a PIC relocation model when the resulting code won't be in a shared library. The simplest path to here is to expose a single bit option in the TargetOptions. If folks have different/better designs, I'm all ears. =] I've included the first optimization based upon this: changing TLS models to the *Exec models when PIE is enabled. This is the LLVM component of PR12380 and is all of the hard work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154294 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge with upstream LLVM @152063Stephen Hines2012-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed call to getsid() from LockFileManager.cpp, since bionic doesn't have support for it. Build updates +TableGenAction.cpp +X86ModRMFilters.cpp -InstrEnumEmitter.cpp -JITDebugRegisterer.cpp -MCLoggingStreamer.cpp +Hashing.cpp -ElfCodeEmitter.cpp -ElfWriter.cpp -ObjectCodeEmitter.cpp +DataStream.cpp +StreamableMemoryObject.cpp +CmpInstAnalysis.cpp +LockFileManager.cpp +IntrusiveRefCntPtr.cpp +ThreadSanitizer.cpp +ARMMachineFunctionInfo.cpp +ARMELFObjectWriter.cpp +MipsAnalyzeImmediate.cpp +MipsMachineFunction.cpp +X86MachineFunctionInfo.cpp +X86ELFObjectWriter.cpp +X86WinCOFFObjectWriter.cpp +ResourcePriorityQueue.cpp +ScheduleDAGVLIW.cpp +MachineCopyPropagation.cpp +MachineScheduler.cpp +RegAllocBase.cpp +libLLVMVectorize Change-Id: I69e700fe357e275ec509af1daaa7408cd3cde3a1
* | Merge branch 'upstream' into merge-20120305Stephen Hines2012-03-051-9/+7
|\ \ | |/ | | | | | | | | | | Conflicts: lib/Support/Atomic.cpp Change-Id: I563b3bc2a82942ccbae5bed42e53b9149a8bf3a0
| * RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick2012-02-101-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add a TargetOption for disabling tail calls.Nick Lewycky2012-01-191-0/+6
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148442 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-2/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
| * drop unneeded config.h includesDylan Noblesmith2011-12-221-1/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147197 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge with LLVM upstream r146714 (Dec 16th 2011)Logan Chien2011-12-162-2/+157
|\ \ | |/ | | | | Change-Id: Ied458adb08bf9a69250cbcee9b14b44d17e8701a
| * LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
| * Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-1/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
* | Add build rules for MIPS.Logan Chien2011-11-271-13/+43
| | | | | | | | Change-Id: Id929ad67b41e048102e89617bf6d2ba390aac1f1
* | Merge with LLVM upstream r145126 (Nov 25th 2011)Logan Chien2011-11-251-14/+14
|\ \ | |/ | | | | Change-Id: I30d08ae004a4c3c74092ad2537ab30cce4280e1d
| * Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-14/+14
| | | | | | | | | | | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge with LLVM upstream r144606 (Nov 15th 2011)Logan Chien2011-11-151-0/+23
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: Makefile.rules configure docs/ReleaseNotes.html lib/Analysis/ScalarEvolution.cpp lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp lib/CodeGen/ExecutionDepsFix.cpp lib/CodeGen/MachineBlockPlacement.cpp lib/CodeGen/MachineBranchProbabilityInfo.cpp lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/ExecutionEngine/JIT/LLVMBuild.txt lib/MC/LLVMBuild.txt lib/MC/MCDisassembler/LLVMBuild.txt lib/MC/MCDwarf.cpp lib/Object/LLVMBuild.txt lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMFastISel.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/AsmParser/ARMAsmParser.cpp lib/Target/ARM/Disassembler/ARMDisassembler.cpp lib/Target/ARM/Disassembler/LLVMBuild.txt lib/Target/ARM/TargetInfo/LLVMBuild.txt lib/Target/CBackend/TargetInfo/LLVMBuild.txt lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt lib/Target/CellSPU/TargetInfo/LLVMBuild.txt lib/Target/CppBackend/TargetInfo/LLVMBuild.txt lib/Target/LLVMBuild.txt lib/Target/MBlaze/Disassembler/LLVMBuild.txt lib/Target/MBlaze/TargetInfo/LLVMBuild.txt lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt lib/Target/MSP430/TargetInfo/LLVMBuild.txt lib/Target/Mips/CMakeLists.txt lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp lib/Target/Mips/Mips64InstrInfo.td lib/Target/Mips/MipsAsmPrinter.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsMCInstLower.cpp lib/Target/Mips/TargetInfo/LLVMBuild.txt lib/Target/PTX/LLVMBuild.txt lib/Target/PTX/PTXAsmPrinter.cpp lib/Target/PTX/TargetInfo/LLVMBuild.txt lib/Target/PowerPC/TargetInfo/LLVMBuild.txt lib/Target/Sparc/TargetInfo/LLVMBuild.txt lib/Target/X86/TargetInfo/LLVMBuild.txt lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrSSE.td lib/Target/XCore/MCTargetDesc/LLVMBuild.txt lib/Target/XCore/TargetInfo/LLVMBuild.txt lib/Transforms/IPO/LLVMBuild.txt lib/Transforms/Utils/LLVMBuild.txt test/CodeGen/ARM/2011-10-26-memset-with-neon.ll test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll test/CodeGen/ARM/fast-isel-cmp-imm.ll test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll test/CodeGen/CellSPU/call_indirect.ll test/CodeGen/X86/avx2-logic.ll test/CodeGen/X86/block-placement.ll test/CodeGen/X86/sse-domains.ll test/CodeGen/X86/sse3.ll test/CodeGen/X86/vec_shuffle-39.ll test/MC/ARM/neon-vld-encoding.s test/MC/ARM/neon-vst-encoding.s tools/llvm-config-2/llvm-config.cpp utils/TableGen/LLVMBuild.txt Change-Id: I70f454db6fc79d7799f56d0f6f2eb7b99561c504
| * LLVMBuild: Add description files for the LLVM tools.Daniel Dunbar2011-11-111-0/+23
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144417 91177308-0d34-0410-b5e6-96231b3b80d8
| * rename getHostTriple into getDefaultTargetTripleSebastian Pop2011-11-011-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143502 91177308-0d34-0410-b5e6-96231b3b80d8
| * Switch new .file directive emission off by default, change llc's flag for it toNick Lewycky2011-10-311-4/+4
| | | | | | | | | | | | | | -enable-dwarf-directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143326 91177308-0d34-0410-b5e6-96231b3b80d8
* | rename getHostTriple into getDefaultTargetTripleSebastian Pop2011-11-141-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143502 91177308-0d34-0410-b5e6-96231b3b80d8
* | Switch new .file directive emission off by default, change llc's flag for it toNick Lewycky2011-11-141-4/+4
| | | | | | | | | | | | | | -enable-dwarf-directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143326 91177308-0d34-0410-b5e6-96231b3b80d8
* | Apply changes to migrate to upstream Oct 20th 2011.Logan Chien2011-10-211-1/+1
| | | | | | | | Change-Id: I2bb819151f3fa5ce18690ef373bf071205d3f278
* | Merge with LLVM upstream 2011/10/20 (r142530)Logan Chien2011-10-202-18/+36
|\ \ | |/ | | | | | | | | | | Conflicts: lib/Support/Unix/Host.inc Change-Id: Idc00db3b63912dca6348bddd9f8a1af2a8d5d147
| * build: Tidy up a bunch of tool Makefiles, and simplify where possible using theDaniel Dunbar2011-10-181-10/+4
| | | | | | | | | | | | new all-targets pseudo-component. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142401 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add support for a new extension to the .file directive:Nick Lewycky2011-10-171-0/+6
| | | | | | | | | | | | | | | | | | | | | | .file filenumber "directory" "filename" This removes one join+split of the directory+filename in MC internals. Because bitcode files have independent fields for directory and filenames in debug info, this patch may change the .o files written by existing .bc files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142300 91177308-0d34-0410-b5e6-96231b3b80d8
| * Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang ↵Chris Lattner2011-10-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | does. Enhance the X86 asmparser to produce ranges in the one case that was annoying me, for example: test.s:10:15: error: invalid operand for instruction movl 0(%rax), 0(%edx) ^~~~~~~ It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use ranges where appropriate if someone is interested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142106 91177308-0d34-0410-b5e6-96231b3b80d8
| * Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-2/+2
| | | | | | | | | | | | | | These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
| * Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,Evan Cheng2011-07-221-3/+1
| | | | | | | | | | | | | | InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
| * Move the registered target printing in version strings completely out ofChandler Carruth2011-07-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the Support library. Now its part of the TargetRegistry, and the three commands that care about this explicitly register this extra bit of version information. The set of commands which care was computed by intersecting those which use the Support library's version string printing and those that initialize all the registered targets in a way that produces a meaningful list. The only odd ball out is that 'clang -cc1as -version' no longer prints the registered targets. I don't think anyone is really interested in that (especially as the fact that llvm-mc does so is under a FIXME), but if someone really does want this back I'll happily apply the same patch there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135757 91177308-0d34-0410-b5e6-96231b3b80d8
| * - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-2/+19
| | | | | | | | | | | | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
* | Add build rules for llc, opt, and llvm-link on target device.Logan Chien2011-10-191-0/+91
|/ | | | Change-Id: I42f35da6f5ce77ab8969746131f5e6fdd42e5afa
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-1/+17
| | | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
* LLC doesn't need to create MCInstrInfo's.Evan Cheng2011-07-181-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135369 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-0/+1
| | | | | | MCTargetDesc to prepare for next round of changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-0/+1
| | | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
* Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng2011-07-091-0/+1
| | | | | | | | | | CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-3/+3
| | | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink SubtargetFeature and TargetInstrItineraries (renamed ↵Evan Cheng2011-06-291-1/+1
| | | | | | MCInstrItineraries) into MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead option.Evan Cheng2011-05-241-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131947 91177308-0d34-0410-b5e6-96231b3b80d8
* Add all the plumbing needed for MC to expand cfi to the old tables inRafael Espindola2011-04-301-0/+6
| | | | | | | the final assembly. It is the same technique used when targeting assemblers that don't support .loc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130587 91177308-0d34-0410-b5e6-96231b3b80d8
* llc: Fix a refacto, .loc support didn't work before 10.6.Daniel Dunbar2011-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129841 91177308-0d34-0410-b5e6-96231b3b80d8
* ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OSDaniel Dunbar2011-04-201-1/+2
| | | | | | triple component. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129838 91177308-0d34-0410-b5e6-96231b3b80d8
* llc: Eliminate a use of getDarwinMajorNumber().Daniel Dunbar2011-04-191-12/+4
| | | | | | | | | - As before, there is a minor semantic change here (evidenced by the test change) for Darwin triples that have no version component. I debated changing the default behavior of isOSVersionLT, but decided it made more sense for triples to be explicit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129805 91177308-0d34-0410-b5e6-96231b3b80d8
* Added *hidden* flags -print-options and -print-all-options soAndrew Trick2011-04-051-0/+3
| | | | | | | | | | | | | | | | | | | | developers can see if their driver changed any cl::Option's. The current implementation isn't perfect but handles most kinds of options. This is nice to have when decomposing the stages of compilation and moving between different drivers. It's also a good sanity check when comparing results produced by different command line invocations that are expected to produce the comparable results. Note: This is not an attempt to prolong the life of cl::Option. On the contrary, it's a placeholder for a feature that must exist when cl::Option is replaced by a more appropriate framework. A new framework needs: a central option registry, dynamic name lookup, non-global containers of option values (e.g. per-module, per-function), *and* the ability to print options values and their defaults at any point during compilation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128910 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2011-04-051-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128905 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable .loc support on older darwin OSes.Devang Patel2010-12-021-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120747 91177308-0d34-0410-b5e6-96231b3b80d8
* Add hiddent command line option, as an debugging aid, to disable .loc use.Devang Patel2010-12-011-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120575 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge System into Support.Michael J. Spencer2010-11-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
* Move tool_output_file into its own file.Dan Gohman2010-10-071-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115973 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."Michael J. Spencer2010-09-131-3/+2
| | | | | | | | | | This reverts commit r113632 Conflicts: cmake/modules/AddLLVM.cmake git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
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