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path: root/utils/TableGen/AsmMatcherEmitter.cpp
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* Convert some tab stops into spaces.Duncan Sands2010-07-121-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher: Ensure classes are totally ordered, so we can std::sort them ↵Daniel Dunbar2010-05-271-1/+10
| | | | | | reliably. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104806 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ↵Daniel Dunbar2010-05-221-4/+8
| | | | | | instead of just one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Matcher: Add support for over-riding the default MatchInstruction functionDaniel Dunbar2010-05-041-4/+8
| | | | | | | name (for example, to allow targets to interpose the actual MatchInstruction function). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102987 91177308-0d34-0410-b5e6-96231b3b80d8
* change Target.getInstructionsByEnumValue to return a referenceChris Lattner2010-03-191-2/+2
| | | | | | | | to a vector that CGT stores instead of synthesizing it on every call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8
* don't go through getInstructions().Chris Lattner2010-03-191-10/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98906 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,Daniel Dunbar2010-03-181-5/+11
| | | | | | to allow custom post-processing of matched instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98857 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix bug where trailing tied operands were forgotten; the X86 assemblerDaniel Dunbar2010-02-121-19/+43
| | | | | | | | | matcher is now free of implicit operands! - Still need to clean up the code now that we don't to worry about implicit operands, and to make it a hard error if an instruction fails to specify all of its operands for some reason. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95956 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Tweak conversion function name.Daniel Dunbar2010-02-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95802 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Add support for creating tied operands when constructing MCInsts.Daniel Dunbar2010-02-101-9/+67
| | | | | | | - Pretty messy, but we need to rework how we handle tied operands in MCInst anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95774 91177308-0d34-0410-b5e6-96231b3b80d8
* pass stringref by value instead of by const&Chris Lattner2010-02-091-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcherEmitter: Use stable_sort when reordering instructions, so that orderDaniel Dunbar2010-02-021-3/+5
| | | | | | | is still deterministic even amongst ambiguous instructions (eventually ambiguous match orders will be a hard error, but we aren't there yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95157 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher: Create operand classes before use, apparently records aren't visitedDaniel Dunbar2010-01-301-1/+7
| | | | | | in the order they were declared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94868 91177308-0d34-0410-b5e6-96231b3b80d8
* Modified the register matcher function in AsmMatcher toSean Callanan2010-01-231-3/+5
| | | | | | | | | | | | be static. Also made it possible for clients to get it and no other functions from ...GenAsmMatcher.inc by defining REGISTERS_ONLY before including GenAsmMatcher.inc. This sets the stage for target-specific lexers that can identify registers and return AsmToken::Register as appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94266 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher: Add a comment.Daniel Dunbar2010-01-231-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94261 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the TargetAsmParser "ParseInstruction" interface in half:Chris Lattner2010-01-141-9/+13
| | | | | | | | | | | | the new ParseInstruction method just parses and returns a list of target operands. A new MatchInstruction interface is used to turn the operand list into an MCInst. This requires new/deleting all the operands, but it also gives targets the ability to use polymorphic operands if they want to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax')Daniel Dunbar2009-08-111-25/+102
| | | | | | | We now match all of 403.gcc (as emitted by clang). :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78750 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 'isCodeGenOnly' bit to Instruction .td records.Daniel Dunbar2009-08-111-20/+13
| | | | | | | | | | | | | | | | - Used to mark fake instructions which don't correspond to an actual machine instruction (or are duplicates of a real instruction). This is to be used for "special cases" in the .td files, which should be ignored by things like the assembler and disassembler. We still need a good solution to handle pervasive duplication, like with the Int_ instructions. - Set the bit on fake "mov 0" style instructions, which allows turning an assembler matcher warning into a hard error. - -2 FIXMEs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will beDaniel Dunbar2009-08-111-1/+26
| | | | | | | used to strip hard coded comments out of .td assembly strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78716 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Fix two thinkos in determining whether two classes areDaniel Dunbar2009-08-111-4/+23
| | | | | | | related. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78706 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands.Daniel Dunbar2009-08-111-71/+256
| | | | | | | - This drops us to 123 ambiguous instructions (previously ~500) on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78636 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to callDaniel Dunbar2009-08-101-2/+21
| | | | | | | | on target specific operands for testing class membership and converting to MCInst operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78597 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Remove some code which has been obsoleted by move toDaniel Dunbar2009-08-101-24/+4
| | | | | | | explicit parser match classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78588 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Change assembler parser match classes to their own recordDaniel Dunbar2009-08-101-61/+56
| | | | | | | structure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78581 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Check for matches with super classes when matchingDaniel Dunbar2009-08-101-1/+52
| | | | | | | instruction operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78565 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Fix thinko in ClassInfo::operator<.Daniel Dunbar2009-08-091-2/+7
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* llvm-mc/AsmParser: Add hack to ignore Int_* and *_Int instructions for now, toDaniel Dunbar2009-08-091-0/+11
| | | | | | | | | | | make it easier to see interesting ambiguities. - Also, check that user doesn't try to redefine the super class. This is a wart in the current design, in that assembler match classes aren't explicitly declared somewhere (so there isn't a unique place to declare the super class). This should probably be fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78532 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Implement user defined super classes.Daniel Dunbar2009-08-091-10/+72
| | | | | | | - We can now discriminate SUB32ri8 from SUB32ri, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Separate instruction ordering for ambiguity detection.Daniel Dunbar2009-08-091-36/+45
| | | | | | | | | | | | - We want the ordering operation to be simple, since we run it on every match. The old ordering is also not a strict weak ordering when there are ambiguities, which makes MSVC unhappy. - While we are at it, detect all ambiguities instead of just the adjacent ones. There are actually 655, for X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78526 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Define match classes in the .td file.Daniel Dunbar2009-08-091-27/+39
| | | | | | | -2 FIXMEs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmParser: Sketch infrastructure for ordering instructions & detectingDaniel Dunbar2009-08-091-14/+106
| | | | | | | | ambiguities. - Currently there are 483 ambiguities to resolve. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78522 91177308-0d34-0410-b5e6-96231b3b80d8
* fix editoChris Lattner2009-08-081-1/+0
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* llvm-mc/AsmMatcher: Tweak string matcher (missed a newline).Daniel Dunbar2009-08-081-1/+1
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* llvm-mc/AsmMatcher: Tweak string matcher.Daniel Dunbar2009-08-081-26/+28
| | | | | | | | | | | | - Track whether we need to insert an explicit 'break'. - Invert conditional when matching a single prefix to reduce nesting/bracing/breaking. - wc -l of X86GenAsmMatcher.inc decreased by 10%. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78513 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.Daniel Dunbar2009-08-081-33/+31
| | | | | | | | Also, redefined MatchRegisterName to just return the register value or a sentinel, to simplify the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
* add a little function to do arbitrary string pattern matching in aChris Lattner2009-08-081-3/+138
| | | | | | | | | much more efficient way than a sequence of if's. Switch MatchRegisterName to use it. It would be nice if someone could factor this out to a shared place in tblgen :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78492 91177308-0d34-0410-b5e6-96231b3b80d8
* add another constChris Lattner2009-08-081-1/+1
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* remove a useless anon-ns, make table const.Chris Lattner2009-08-081-6/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78486 91177308-0d34-0410-b5e6-96231b3b80d8
* MSVC doesn't like member variables with the same name as the class.Benjamin Kramer2009-08-081-13/+13
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* llvm-mc/AsmMatcher: Improve match code.Daniel Dunbar2009-08-081-102/+318
| | | | | | | | | | | | | | | - This doesn't actually improve the algorithm (its still linear), but the generated (match) code is now fairly compact and table driven. Still need a generic string matcher. - The table still needs to be compressed, this is quite simple to do and should shrink it to under 16k. - This also simplifies and restructures the code to make the match classes more explicit, in anticipation of resolving ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Switch to a unified function to convert operands to MCInst,Daniel Dunbar2009-08-081-42/+73
| | | | | | | | | | so that terminal states are as simple as possible. - If we were willing to assume that the order that operands get inserted in the MCInst is fixed we could actually dispose with this altogether, although it might be nice to have the flexibility to change it later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78458 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Move emit for register -> enum matcher into a separate ↵Daniel Dunbar2009-08-071-11/+18
| | | | | | routine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78408 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Tweaks in response to feedback.Daniel Dunbar2009-08-071-14/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78404 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc/AsmMatcher: Move to a slightly more sane matching design.Daniel Dunbar2009-08-071-196/+491
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Still not very sane, but a least its not 60k lines on X86. :) - In terms of correctness, currently some things are hard wired for X86, and we still don't properly resolve ambiguities (this is ignoring the instructions we don't even match due to funny .td stuff or other corner cases). The high level changes: 1. Represent tokens which are significant for matching explicitly as separate operands. This uniformly handles not only the instruction mnemonic, but also 'signficiant' syntax like the '*' in "call * ...". 2. Separate the matching of operands to an instruction from the construction of the MCInst. In theory this can be done during matching, but since the number of variations is small I think it makes sense to decompose the problems. 3. Improved a few of the mechanisms to at least successfully flatten / tokenize the assembly strings for PowerPC and ARM. 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm moving towards for handling ambiguous instructions. The high-bit is to infer a partial ordering of the operand classes (and force the user to specify one if we can't) and use that to resolve ambiguities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78378 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen / AsmMatcher: Tweaks to avoid generating completely bogus matchDaniel Dunbar2009-08-041-17/+75
| | | | | | | | | | | functions. - Fix variant flattening when the variant embeds an operand reference. - Ignore instructions which reference an operand multiple times (e.g., "xorb $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32"). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78099 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MCOperand to use Create style instead of Make style for constructingDaniel Dunbar2009-08-021-1/+1
| | | | | | | operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77837 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Match a few X86 instructions.Daniel Dunbar2009-07-311-0/+239
| | | | | | | | | | | | - This is "experimental" code, I am feeling my way around and working out the best way to do things (and learning tblgen in the process). Comments welcome, but keep in mind this stuff will change radically. - This is enough to match "subb" and friends, but not much else. The next step is to automatically generate the matchers for individual operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77657 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unintended changes.Daniel Dunbar2009-07-301-51/+0
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* Twines: Don't allow implicit conversion from integers, this is too tricky.Daniel Dunbar2009-07-301-0/+51
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77605 91177308-0d34-0410-b5e6-96231b3b80d8
* Match X86 register names to number.Daniel Dunbar2009-07-291-8/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77404 91177308-0d34-0410-b5e6-96231b3b80d8