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* Add a new target independent COPY instruction and code to lower it.Jakob Stoklund Olesen2010-07-021-0/+1
| | | | | | | | | | | The COPY instruction is intended to replace the target specific copy instructions for virtual registers as well as the EXTRACT_SUBREG and INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection DAG. COPY is lowered to native register copies by LowerSubregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up TargetOpcodes.h a bit, and limit the number of places where the fullJakob Stoklund Olesen2010-07-022-88/+33
| | | | | | | | | list of predefined instructions appear. Add some consistency checks. Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it is hardly worth the effort. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107520 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused variables.Duncan Sands2010-06-251-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106834 91177308-0d34-0410-b5e6-96231b3b80d8
* Change array references to match my previous change to use the public typeBob Wilson2010-06-241-1/+1
| | | | | | | names for the array fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106803 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up some comments.Bob Wilson2010-06-241-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106795 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the struct tags mandated by ARM's ABI. Also use the public type names forBob Wilson2010-06-241-4/+51
| | | | | | | the array fields in these structs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106794 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the x86 instructions "pusha" and "popa".Nico Weber2010-06-231-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a tblgen bug.Bruno Cardoso Lopes2010-06-231-1/+1
| | | | | | | | | | | | | | | | | | | Given the pattern below as an example: list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1, (mem_frag addr:$src2))))]; The right reference resolving should lead to: list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1, (mem_frag addr:$src2))))]; But was yielding: list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1, (mem_frag addr:$src2))))]; Fix this by passing the right name when creating a new DagInit node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106670 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't link against libm and libpthread which don't exist in BeOS/Haiku. Also,Nick Lewycky2010-06-231-1/+1
| | | | | | | Haiku like Linux provides <regex.h>, so use it. Patch by Paul Davey! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106620 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a subtle multiclass bug: when using class inheritance onBruno Cardoso Lopes2010-06-221-4/+4
| | | | | | | | a toplevel 'defm', make sure to properly resolve references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106570 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove isTwoAddress from llvm.Eric Christopher2010-06-211-11/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106470 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for returning multiple vectors via sret, which is how the ARM ↵Nate Begeman2010-06-201-30/+42
| | | | | | target expects the intrinsics to work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106406 91177308-0d34-0410-b5e6-96231b3b80d8
* An attempt to fix the problem Anton reported withDale Johannesen2010-06-181-0/+1
| | | | | | | | | ARM tail calls. Don't know if it works, but it doesn't break Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106309 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach tablegen how to inherit from classes in 'defm' definitions.Bruno Cardoso Lopes2010-06-181-0/+50
| | | | | | | | | The rule is simple: only inherit from a class list if they come in the end, after the last multiclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106305 91177308-0d34-0410-b5e6-96231b3b80d8
* Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman2010-06-182-2/+3
| | | | | | | | MachineRegisterInfo doesn't have to confusingly allocate an extra entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
* In case Rec is a definition and not a class, do the proper comparison!Bruno Cardoso Lopes2010-06-171-1/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106246 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify tablegen to support generating all NEON code used by clang at once.Nate Begeman2010-06-172-89/+135
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106207 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the handling of !if result, avoiding null results for non 'int'.Bruno Cardoso Lopes2010-06-171-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106201 91177308-0d34-0410-b5e6-96231b3b80d8
* For a tablegen expression such as !if(a,b,c), let 'a'Bruno Cardoso Lopes2010-06-171-2/+4
| | | | | | | be evaluated for 'bit' operators git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106185 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the typo in my previous one-line commit.Sean Hunt2010-06-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106179 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure CMake can build the files added by my previous commit.Sean Hunt2010-06-161-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106178 91177308-0d34-0410-b5e6-96231b3b80d8
* Add preliminary clang attribute generation support.Sean Hunt2010-06-163-0/+147
| | | | | | | The attribute class generation support is still somewhat limited. See the accompanying clang commit for more details. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106174 91177308-0d34-0410-b5e6-96231b3b80d8
* let the '!eq' expression support 'int' and 'bit' typesBruno Cardoso Lopes2010-06-161-1/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106171 91177308-0d34-0410-b5e6-96231b3b80d8
* Make VC++ happy Nate Begeman2010-06-151-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106054 91177308-0d34-0410-b5e6-96231b3b80d8
* Next round of tail call changes. Register used in a tailDale Johannesen2010-06-152-1/+3
| | | | | | | | | | call must not be callee-saved; following x86, add a new regclass to represent this. Also fixes a couple of bugs. Still disabled by default; Thumb doesn't work yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106053 91177308-0d34-0410-b5e6-96231b3b80d8
* generate better code in CheckComplexPatternChris Lattner2010-06-141-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105970 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the last of the SemaChecking-gen code.Nate Begeman2010-06-141-2/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105929 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a helping of commentsNate Begeman2010-06-131-8/+105
| | | | | | | Add code for generating bits of semachecking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105907 91177308-0d34-0410-b5e6-96231b3b80d8
* declare a class with 'class' instead of struct to avoid tag mismatch Chris Lattner2010-06-121-1/+1
| | | | | | | warnings, and don't shift by a bool. Patch by Rizky Herucakra! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105886 91177308-0d34-0410-b5e6-96231b3b80d8
* Add generic vector support for bitselect & element byteswapNate Begeman2010-06-122-31/+75
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105874 91177308-0d34-0410-b5e6-96231b3b80d8
* More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)Bruno Cardoso Lopes2010-06-111-1/+8
| | | | | | | Introduce the VEX_X field git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
* Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson2010-06-111-4/+1
| | | | | | | | | | | | the machine instruction representation of the immediate value to be encoded into an integer with similar fields as the actual VMOV instruction. This makes things easier for the disassembler, since it can just stuff the bits into the immediate operand, but harder for the asm printer since it has to decode the value to be printed. Testcase for the encoding will follow later when MC has more support for ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105836 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for polynomial type, for polynomial multiplyNate Begeman2010-06-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105792 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach tablegen to allow "let" expressions inside multiclasses,Bruno Cardoso Lopes2010-06-102-53/+43
| | | | | | | providing more ways to factor out commonality from the records. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105776 91177308-0d34-0410-b5e6-96231b3b80d8
* NEON support for _lane ops, and multiplies by scalar.Nate Begeman2010-06-102-45/+79
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105769 91177308-0d34-0410-b5e6-96231b3b80d8
* Further refine types for operations which take scalars.Nate Begeman2010-06-091-8/+8
| | | | | | | This will be used primarily by NEON shift intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105733 91177308-0d34-0410-b5e6-96231b3b80d8
* How about ULL...Eric Christopher2010-06-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105726 91177308-0d34-0410-b5e6-96231b3b80d8
* Specialize I-Class instructions better so that we have less work to do in ↵Nate Begeman2010-06-091-4/+20
| | | | | | | | | codegen. Parenthesize macro args git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105682 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle instructions which need to be #defines for the purpose of capturing ↵Nate Begeman2010-06-092-24/+62
| | | | | | | | | constant arguments Handle extract hi/lo with common code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105666 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-083-2/+10
| | | | | | | immediates to avoid breaking the build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a valgrind error.Nate Begeman2010-06-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105600 91177308-0d34-0410-b5e6-96231b3b80d8
* Refine BuiltinsARM.def types a bit, we should do a better job of this to ↵Nate Begeman2010-06-081-2/+4
| | | | | | save some c++ code in CGBuiltins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105598 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON:Nate Begeman2010-06-082-11/+55
| | | | | | | | fix vcvt naming handle vdup, vcombine with generic vector code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105588 91177308-0d34-0410-b5e6-96231b3b80d8
* clang codegen supportNate Begeman2010-06-071-73/+83
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105531 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-052-9/+1
| | | | | | | | | | | | | | | | In file included from X86InstrInfo.cpp:16: X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-052-1/+9
| | | | | | | yet, only assembly encoding support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach tablegen to support 'defm' inside multiclasses.Bruno Cardoso Lopes2010-06-052-10/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105519 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle multi-vector returns and args.Nate Begeman2010-06-041-24/+71
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105496 91177308-0d34-0410-b5e6-96231b3b80d8
* Additional fixes to BuiltinsARM.def generator, on to clang codegen.Nate Begeman2010-06-041-9/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105488 91177308-0d34-0410-b5e6-96231b3b80d8
* Progress on generating BuiltinsARM.def, still some duplicates to work out.Nate Begeman2010-06-041-3/+110
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105461 91177308-0d34-0410-b5e6-96231b3b80d8
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