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| * Add missing index comments to the left side of the DAG ISel matcher table ↵Craig Topper2013-09-221-2/+6
| | | | | | | | | | | | for each individual case of SwitchOpcode/Type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191181 91177308-0d34-0410-b5e6-96231b3b80d8
| * Provide basic type safety for array_pod_sort comparators.Benjamin Kramer2013-09-222-6/+7
| | | | | | | | | | | | | | | | This makes using array_pod_sort significantly safer. The implementation relies on function pointer casting but that should be safe as we're dealing with void* here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191175 91177308-0d34-0410-b5e6-96231b3b80d8
| * TableGen: fix constness of new comparison function.Tim Northover2013-09-161-1/+1
| | | | | | | | | | | | libc++ didn't seem to like a non-const call operator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190797 91177308-0d34-0410-b5e6-96231b3b80d8
| * TableGen: give asm match classes deterministic order.Tim Northover2013-09-161-23/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TableGen was sorting the entries in some of its internal data structures by pointer. This order filtered through to the final matching table and affected the diagnostics produced on bad assembly occasionally. It also turns out STL algorithms are ridiculously easy to misuse on containers with custom order methods. (No bugs before, or now that I know of, but plenty in the middle). This should fix the sanitizer bot, which ends up with weird pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190793 91177308-0d34-0410-b5e6-96231b3b80d8
| * AsmMatcher: emit subtarget feature enum in deterministic order.Tim Northover2013-09-161-7/+7
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190792 91177308-0d34-0410-b5e6-96231b3b80d8
| * Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-151-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190770 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add an instruction deprecation feature to TableGen.Joey Gouly2013-09-124-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'Deprecated' class allows you to specify a SubtargetFeature that the instruction is deprecated on. The 'ComplexDeprecationPredicate' class allows you to define a custom predicate that is called to check for deprecation. For example: ComplexDeprecationPredicate<"MCR"> would mean you would have to define the following function: bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, std::string &Info) Which returns 'false' for not deprecated, and 'true' for deprecated and store the warning message in 'Info'. The MCTargetAsmParser constructor was chaned to take an extra argument of the MCInstrInfo class, so out-of-tree targets will need to be changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190598 91177308-0d34-0410-b5e6-96231b3b80d8
| * llvm-tblgen: Mangle operand replacements into the strings in printAliasInstr.Benjamin Kramer2013-09-111-40/+45
| | | | | | | | | | | | Cuts down the bloat in the AArch64 asm writer a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190527 91177308-0d34-0410-b5e6-96231b3b80d8
| * llvm-tblgen: Stabilize subreg index tables.Benjamin Kramer2013-09-111-2/+2
| | | | | | | | | | | | Otherwise SequenceToOffsetTable will sort by pointer and becomes non-deterministic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190514 91177308-0d34-0410-b5e6-96231b3b80d8
| * TableGen: Enumerate Schedule Model too.Vincent Lejeune2013-09-031-1/+9
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189839 91177308-0d34-0410-b5e6-96231b3b80d8
| * Tidy up. Comment grammar.Jim Grosbach2013-08-291-2/+2
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189618 91177308-0d34-0410-b5e6-96231b3b80d8
| * Tidy up. Trailing whitespace.Jim Grosbach2013-08-291-39/+39
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189617 91177308-0d34-0410-b5e6-96231b3b80d8
| * Move StringToOffsetTable into the TableGen include directory so I can use it ↵Craig Topper2013-08-292-84/+1
| | | | | | | | | | | | in clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189567 91177308-0d34-0410-b5e6-96231b3b80d8
| * Option parsing: support case-insensitive option matching.Rui Ueyama2013-08-281-5/+10
| | | | | | | | | | | | Re-submitting r189416 with fix for Windows build on where strcasecmp is not defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189501 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add missing includeCraig Topper2013-08-281-0/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189448 91177308-0d34-0410-b5e6-96231b3b80d8
| * Revert "Option parsing: support case-insensitive option matching." as it ↵Rui Ueyama2013-08-281-14/+16
| | | | | | | | | | | | | | | | broke Windows buildbot. This reverts r189416. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189424 91177308-0d34-0410-b5e6-96231b3b80d8
| * Option parsing: support case-insensitive option matching.Rui Ueyama2013-08-271-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Link.exe's command line options are case-insensitive. This patch adds a new attribute to OptTable to let the option parser to compare options, ignoring case. Command lines are generally case-insensitive on Windows. CL.exe is an exception. So this new attribute should be useful for other commands running on Windows. Differential Revision: http://llvm-reviews.chandlerc.com/D1485 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189416 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add an OtherPreserved field to the CalleeSaved TableGen class.Jakob Stoklund Olesen2013-08-231-1/+13
| | | | | | | | | | | | | | | | | | | | This field specifies registers that are preserved across function calls, but that should not be included in the generates SaveList array. This can be used ot generate regmasks for architectures that save registers through other means, like SPARC's register windows. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189084 91177308-0d34-0410-b5e6-96231b3b80d8
| * AVX-512: Added masked SHIFT commands, more encoding testsElena Demikhovsky2013-08-221-17/+23
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189005 91177308-0d34-0410-b5e6-96231b3b80d8
| * ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-222-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Back in the mists of time (2008), it seems TableGen couldn't handle the patterns necessary to match ARM's CMOV node that we convert select operations to, so we wrote a lot of fairly hairy C++ to do it for us. TableGen can deal with it now: there were a few minor differences to CodeGen (see tests), but nothing obviously worse that I could see, so we should probably address anything that *does* come up in a localised manner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188995 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fixing a warning about control reaching the end of a non-void function.Aaron Ballman2013-08-161-0/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188524 91177308-0d34-0410-b5e6-96231b3b80d8
| * [Mips][msa] Value types for MSA support.Jack Carter2013-08-131-0/+1
| | | | | | | | | | | | | | | | | | | | Added v8f16 to ValueTypes.h, ValueTypes.cpp, ValueTypes.td, and CodeGenTarget.cpp Patch by Daniel Sanders git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188326 91177308-0d34-0410-b5e6-96231b3b80d8
| * Revert r188164: Stablize MCK_Reg ordering in AsmMatcherEmitterRichard Sandiford2013-08-121-21/+19
| | | | | | | | | | | | | | Apparently caused a failure on Darwin git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188166 91177308-0d34-0410-b5e6-96231b3b80d8
| * Stablize MCK_Reg ordering in AsmMatcherEmitterRichard Sandiford2013-08-121-19/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clang bootstraps intermittently failed for me due a difference in the MCK_Reg ordering in ARMGenAsmMatcher.inc. E.g. in my latest run the stage 1 and stage 3 versions were the same but the stage 2 one was different (though still functionally correct). This meant that the .o comparison failed. MCK_Regs were assigned by iterating over a std::set< std::set<Record*> >, and since std::set is sorted lexicographically, the order depended on the order of the pointer values. This patch replaces the pointer ordering with LessRecordByID. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188164 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge commit '10251753b6897adcd22cc981c0cc42f348c109de' into merge-20130807Stephen Hines2013-08-0718-150/+797
|\ \ | |/ | | | | | | | | | | | | Conflicts: lib/Archive/ArchiveReader.cpp lib/Support/Unix/PathV2.inc Change-Id: I29d8c1e321a4a380b6013f00bac6a8e4b593cc4e
| * Remove some std stream usage from Support and TableGenReid Kleckner2013-08-061-1/+2
| | | | | | | | | | | | | | | | | | | | LLVM's coding standards recommend raw_ostream and MemoryBuffer for reading and writing text. This has the side effect of allowing clang to compile more of Support and TableGen in the Microsoft C++ ABI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187826 91177308-0d34-0410-b5e6-96231b3b80d8
| * Moving definition of MnemonicContainsDot field from class Instruction to ↵Vladimir Medic2013-08-011-2/+1
| | | | | | | | | | | | class AsmParser as suggested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187569 91177308-0d34-0410-b5e6-96231b3b80d8
| * Option parsing: remove non-SUPPORT_ALIASARGS fall-backHans Wennborg2013-07-311-14/+2
| | | | | | | | | | | | | | | | The clients of this code have been updated to all support AliasArgs. This depends on Clang r187538 and lld r187541. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187546 91177308-0d34-0410-b5e6-96231b3b80d8
| * Option parsing: add support for alias arguments.Hans Wennborg2013-07-311-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes option aliases more powerful by enabling them to pass along arguments to the option they're aliasing. For example, if we have a joined option "-foo=", we can now specify a flag option "-bar" to be an alias of that, with the argument "baz". This is especially useful for the cl.exe compatible clang driver, where many options are aliases. For example, this patch enables us to alias "/Ox" to "-O3" (-O is a joined option), and "/WX" to "-Werror" (again, -W is a joined option). Differential Revision: http://llvm-reviews.chandlerc.com/D1245 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187537 91177308-0d34-0410-b5e6-96231b3b80d8
| * comment typo.Andrew Trick2013-07-311-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187531 91177308-0d34-0410-b5e6-96231b3b80d8
| * Revert "TableGen: Enumerate Schedule Model too."Tom Stellard2013-07-311-7/+0
| | | | | | | | | | | | This reverts commit 2ca1e4a39c7e0d7a00e66ff5437c6d7ace2404a0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187525 91177308-0d34-0410-b5e6-96231b3b80d8
| * TableGen: Enumerate Schedule Model too.Vincent Lejeune2013-07-311-0/+7
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187511 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fix register pressure tables on ARM.Andrew Trick2013-07-311-3/+31
| | | | | | | | | | | | The heuristic that merges register pressure sets was bogus for ARM's S/D regs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187479 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add tracing to the tblgen register pressure table generator.Andrew Trick2013-07-311-7/+63
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187478 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove use of sprintf added to X86 disassembler tablegen code. Send message ↵Craig Topper2013-07-281-4/+2
| | | | | | | | | | | | with instruction name to errs() instead and use a generic message for the llvm_unreachable. Consistent with other places in this file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187333 91177308-0d34-0410-b5e6-96231b3b80d8
| * fixed compilation issueElena Demikhovsky2013-07-281-0/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187325 91177308-0d34-0410-b5e6-96231b3b80d8
| * Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-283-10/+261
| | | | | | | | | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
| * Using a different loop induction variable than the enclosing scope. No ↵Aaron Ballman2013-07-251-2/+2
| | | | | | | | | | | | functional changes intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187159 91177308-0d34-0410-b5e6-96231b3b80d8
| * Fix a bug in TableGen where the intrinsic function name recognizer could ↵Justin Holewinski2013-07-251-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mis-identify names if one was a prefix substring of the other For two intrinsics 'llvm.nvvm.texsurf.handle' and 'llvm.nvvm.texsurf.handle.internal', TableGen was emitting matching code like: if (Name.startswith("llvm.nvvm.texsurf.handle")) ... if (Name.startswith("llvm.nvvm.texsurf.handle.internal")) ... We can never match "llvm.nvvm.texsurf.handle.internal" here because it will always be erroneously matched by the first condition. The fix is to sort the intrinsic names and emit them in reverse order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187119 91177308-0d34-0410-b5e6-96231b3b80d8
| * RegPressure: Order the "pressure sets" by number of regunits per set.Andrew Trick2013-07-253-8/+53
| | | | | | | | | | | | This lets heuristics easily pick the most important set to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187108 91177308-0d34-0410-b5e6-96231b3b80d8
| * Split generated asm mnemonic matching table into a separate table for each ↵Craig Topper2013-07-241-38/+71
| | | | | | | | | | | | | | | | | | | | asm variant. This removes the need to store the asm variant in each row of the single table that existed before. Shaves ~16K off the size of X86AsmParser.o. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187026 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove 'else' after 'return'. No functional change.Craig Topper2013-07-231-2/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186929 91177308-0d34-0410-b5e6-96231b3b80d8
| * Remove trailing whitespace.Craig Topper2013-07-231-26/+26
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186928 91177308-0d34-0410-b5e6-96231b3b80d8
| * This patch allows targets to define weather the instruction mnemonics in asm ↵Vladimir Medic2013-07-161-4/+7
| | | | | | | | | | | | matcher tables will contain '.' character. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186388 91177308-0d34-0410-b5e6-96231b3b80d8
| * Teaching llvm-tblgen to not emit a switch statement when there are no case ↵Aaron Ballman2013-07-153-53/+88
| | | | | | | | | | | | statements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186330 91177308-0d34-0410-b5e6-96231b3b80d8
| * Add 'const' qualifier to some arrays.Craig Topper2013-07-151-1/+1
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186312 91177308-0d34-0410-b5e6-96231b3b80d8
| * Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector ↵Craig Topper2013-07-143-4/+4
| | | | | | | | | | | | size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
| * Extend 'readonly' and 'readnone' to work on function arguments as well asNick Lewycky2013-07-063-1/+15
| | | | | | | | | | | | | | | | functions. Make the function attributes pass add it to known library functions and when it can deduce it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185735 91177308-0d34-0410-b5e6-96231b3b80d8
| * Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ↵Craig Topper2013-07-041-2/+2
| | | | | | | | | | | | specifying the vector size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185606 91177308-0d34-0410-b5e6-96231b3b80d8
| * Improve the compression of the tablegen DiffLists by introducing a new sortChad Rosier2013-06-272-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | algorithm when assigning EnumValues to the synthesized registers. The current algorithm, LessRecord, uses the StringRef compare_numeric function. This function compares strings, while handling embedded numbers. For example, the R600 backend registers are sorted as follows: T1 T1_W T1_X T1_XYZW T1_Y T1_Z T2 T2_W T2_X T2_XYZW T2_Y T2_Z In this example, the 'scaling factor' is dEnum/dN = 6 because T0, T1, T2 have an EnumValue offset of 6 from one another. However, in other parts of the register bank, the scaling factors are different: dEnum/dN = 5: KC0_128_W KC0_128_X KC0_128_XYZW KC0_128_Y KC0_128_Z KC0_129_W KC0_129_X KC0_129_XYZW KC0_129_Y KC0_129_Z The diff lists do not work correctly because different kinds of registers have different 'scaling factors'. This new algorithm, LessRecordRegister, tries to enforce a scaling factor of 1. For example, the registers are now sorted as follows: T1 T2 T3 ... T0_W T1_W T2_W ... T0_X T1_X T2_X ... KC0_128_W KC0_129_W KC0_130_W ... For the Mips and R600 I see a 19% and 6% reduction in size, respectively. I did see a few small regressions, but the differences were on the order of a few bytes (e.g., AArch64 was 16 bytes). I suspect there will be even greater wins for targets with larger register files. Patch reviewed by Jakob. rdar://14006013 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185094 91177308-0d34-0410-b5e6-96231b3b80d8
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