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* Add a pseudo instruction REG_SEQUENCE that takes a list of registers andEvan Cheng2010-05-012-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sub-register indices and outputs a single super register which is formed from a consecutive sequence of registers. This is used as register allocation / coalescing aid and it is useful to represent instructions that output register pairs / quads. For example, v1024, v1025 = vload <address> where v1024 and v1025 forms a register pair. This really should be modelled as v1024<3>, v1025<4> = vload <address> but it would violate SSA property before register allocation is done. Currently we use insert_subreg to form the super register: v1026 = implicit_def v1027 - insert_subreg v1026, v1024, 3 v1028 = insert_subreg v1027, v1025, 4 ... = use v1024 = use v1028 But this adds pseudo live interval overlap between v1024 and v1025. We can now modeled it as v1024, v1025 = vload <address> v1026 = REG_SEQUENCE v1024, 3, v1025, 4 ... = use v1024 = use v1026 After coalescing, it will be v1026<3>, v1025<4> = vload <address> ... = use v1026<3> = use v1026 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102815 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't remove libLTO.dylib if it's not being installed in Developer/usr/lib;Bob Wilson2010-04-291-2/+0
| | | | | | | just leave it in Developer/usr/local/lib. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102646 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option to the Apple-style build to control whether libLTO.dylib shouldBob Wilson2010-04-282-12/+24
| | | | | | | be installed. Disable it by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102531 91177308-0d34-0410-b5e6-96231b3b80d8
* Undo most of my previous whitespace fix. I think I like it better this wayBob Wilson2010-04-281-3/+3
| | | | | | | after all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102508 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inconsistent use of HOSTS and TARGETS variables.Bob Wilson2010-04-281-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102505 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix whitespace.Bob Wilson2010-04-281-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102504 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes to edis that mark x86 call targets asSean Callanan2010-04-231-2/+2
| | | | | | | memory operands rather than immediate operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102217 91177308-0d34-0410-b5e6-96231b3b80d8
* When doing Thumb disassembly, there's no need to consider ↵Johnny Chen2010-04-201-3/+6
| | | | | | | | | t2ADDrSPi12/t2SUBrSPi12, as their generic counterparts t2ADDri12/t2SUBri12 should suffice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8
* stop computing InstImpInputs, it is deadChris Lattner2010-04-202-17/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101881 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.Chris Lattner2010-04-202-15/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101880 91177308-0d34-0410-b5e6-96231b3b80d8
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-182-8/+30
| | | | | | | FU per CPU arch to 32 per intinerary allowing precise modelling of quite complex pipelines in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101754 91177308-0d34-0410-b5e6-96231b3b80d8
* silence some -Wmissing-field-initializers warnings.Chris Lattner2010-04-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101690 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bunch of namespace polution.Dan Gohman2010-04-151-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101376 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary uses of <iostream>.Daniel Dunbar2010-04-151-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101338 91177308-0d34-0410-b5e6-96231b3b80d8
* EDis: Don't include inttypes.h. We support compilers which don't provide it. ↵Benjamin Kramer2010-04-141-2/+0
| | | | | | It was unused anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101241 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -Asserts warnings.Daniel Dunbar2010-04-131-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101191 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a nasty layering violation in the edis sourceSean Callanan2010-04-131-51/+53
| | | | | | | | | | | | | | | | code. It used to #include the enhanced disassembly information for the targets it supported straight out of lib/Target/{X86,ARM,...} but now it uses a new interface provided by MCDisassembler, and (so far) implemented by X86 and ARM. Also removed hacky #define-controlled initialization of targets in edis. If clients only want edis to initialize a limited set of targets, they can set --enable-targets on the configure command line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
* If all the bit positions are not specified; do not decode the instructions.Johnny Chen2010-04-092-9/+15
| | | | | | | | | | | We are bound to fail! For proper disassembly, the well-known encoding bits of the instruction must be fully specified. This also removes pseudo instructions from considerations of disassembly, which is a better design and less fragile than the name matchings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8
* add minix support, patch by Kees van Reeuwijk! PR6797Chris Lattner2010-04-091-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100895 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide versions of the ARM eh_sjlj_setjmp instructions for non-VFP subtargetsBob Wilson2010-04-091-0/+2
| | | | | | | | | | such that the non-VFP versions have no implicit defs of VFP registers. If any callee-saved VFP registers are marked as having been defined, the prologue/epilogue code will try to save and restore them. Radar 7770432. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100892 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM decoder emitter should print out useful information unconditionally when itJohnny Chen2010-04-091-17/+19
| | | | | | | encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100886 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Add support to OneCommandPerFileTest format to take input directory ↵Daniel Dunbar2010-04-091-3/+9
| | | | | | from input path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100846 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround codeJohnny Chen2010-04-081-5/+1
| | | | | | | to avoid memcpy() call is no longer necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100811 91177308-0d34-0410-b5e6-96231b3b80d8
* Various MSVC warning fixes about truncated 64 bit shifts and const pointers ↵Benjamin Kramer2010-04-081-2/+2
| | | | | | passed to free. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100767 91177308-0d34-0410-b5e6-96231b3b80d8
* Use errs instead of fprintf.Benjamin Kramer2010-04-081-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100754 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for ARM disassembly to edis.Sean Callanan2010-04-081-169/+410
| | | | | | | | | | | | I also added a rule to the ARM target's Makefile to build the ARM-specific instruction information table for the enhanced disassembler. I will add the test harness for all this stuff in a separate commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100735 91177308-0d34-0410-b5e6-96231b3b80d8
* rename llvm::llvm_report_error -> llvm::report_fatal_errorChris Lattner2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
* add newlines at end of files.Chris Lattner2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100706 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug where the disassembler would allow an immediateSean Callanan2010-04-071-1/+1
| | | | | | | | | | argument that had to be between 0 and 7 to have any value, firing an assert later in the AsmPrinter. Now, the disassembler rejects instructions with out-of-range values for that immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100694 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo and correct comment somewhat.Eric Christopher2010-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100691 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call inJohnny Chen2010-04-071-2/+6
| | | | | | | ARMDecoderEmitter.cpp, with FIXME comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100690 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial support for different kinds of FU reservation.Anton Korobeynikov2010-04-071-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100645 91177308-0d34-0410-b5e6-96231b3b80d8
* stringref-ize the MemoryBuffer::get apis. This requiresChris Lattner2010-04-051-4/+2
| | | | | | | a co-committed clang patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100485 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-054-88/+12
| | | | | | | | | | | | | | | | | | | When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-042-1/+2
| | | | | | | member of AsmPrinter. Instead, pass it in explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a warning in GCC about a pointless typedef.Chandler Carruth2010-04-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100268 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the new ARMDecodeEmitter to CMake build.Chandler Carruth2010-04-031-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100267 91177308-0d34-0410-b5e6-96231b3b80d8
* Move variable "Bits" declaration/definition into the DEBUG block where its usageJohnny Chen2010-04-021-1/+2
| | | | | | | is expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100247 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed build warning.Johnny Chen2010-04-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100244 91177308-0d34-0410-b5e6-96231b3b80d8
* Change from .../Support/DataTypes.h to .../System/DataTypes.h.Johnny Chen2010-04-022-2/+2
| | | | | | | (Fix build failure) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100243 91177308-0d34-0410-b5e6-96231b3b80d8
* Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen2010-04-024-0/+1926
| | | | | | | | | | | backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Reviewed by Chris Latter and Bob Wilson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a FIXME.Daniel Dunbar2010-03-311-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100034 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Make sure to close any files we open as part of redirection.Daniel Dunbar2010-03-311-1/+7
| | | | | | | PR6753. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100032 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch pattern sorting predicate from stable sort -> sort, itChris Lattner2010-03-291-3/+14
| | | | | | | | | | | | | | | | | | | | | | doesn't need to be stable because the patterns are fully ordered. Add a first level sort predicate that orders patterns in this order: 1) scalar integer operations 2) scalar floating point 3) vector int 4) vector float. This is a trivial sort on their top level pattern type so it is nice and transitive. The benefit of doing this is that simple integer operations are much more common than insane vector things and isel was trying to match the big complex vector patterns before the simple ones because the complexity of the vector operations was much higher. Since they can't both match, it is best (for compile time) to try the simple integer ones first. This cuts down the # failed match attempts on real code by quite a bit, for example, this reduces backtracks on crafty (as a random example) from 228285 -> 188369. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99797 91177308-0d34-0410-b5e6-96231b3b80d8
* revert 99795, as mentioned, it is disabled anyway.Chris Lattner2010-03-291-123/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99796 91177308-0d34-0410-b5e6-96231b3b80d8
* Check in a (disabled) failed attempt to improve the ordering of Chris Lattner2010-03-291-2/+123
| | | | | | | | | | patterns within the generated matcher. This works great except that the sort fails because the relation defined isn't transitive. I have a much simpler solution coming next, but want to archive the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99795 91177308-0d34-0410-b5e6-96231b3b80d8
* print the complexity of the pattern being matched in theChris Lattner2010-03-294-59/+76
| | | | | | | comment in the generated table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99794 91177308-0d34-0410-b5e6-96231b3b80d8
* improve type checking of SDNode operand count. This rejects all casesChris Lattner2010-03-282-8/+10
| | | | | | | | where an incorrect number of operands is provided to an sdnode instead of just a few cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99761 91177308-0d34-0410-b5e6-96231b3b80d8
* finally remove the immAllOnesV_bc/immAllZerosV_bc patternsChris Lattner2010-03-281-1/+0
| | | | | | | | | | | | and those derived from them. These are obnoxious because they were written as: PatLeaf<(bitconvert). Not having an argument was foiling adding better type checking for operand count matching up with what was required (in this case, bitconvert always requires an operand!) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99759 91177308-0d34-0410-b5e6-96231b3b80d8
* teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4), Chris Lattner2010-03-281-1/+37
| | | | | | | | | | transforming it into (add (i32 GPR), 4). This allows us to write type generic multi patterns and have tblgen automatically drop the bitconvert in the case when the types align. This allows us to fold an extra load in the changed testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99756 91177308-0d34-0410-b5e6-96231b3b80d8
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