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* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-1/+1
| | | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a few comments.Dan Gohman2008-08-221-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55157 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-224-48/+99
| | | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
* Basic fast-isel support for instructions with constant int operands.Dan Gohman2008-08-211-13/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the code that limited FastISel to certain fixed signatures.Dan Gohman2008-08-211-19/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55096 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin making more use of the FastISelEmitter class.Dan Gohman2008-08-212-28/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55093 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an obsolete todo comment.Dan Gohman2008-08-201-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55080 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor the code for determining the target-specific instructionDan Gohman2008-08-204-18/+22
| | | | | | | namespace out of the isel emitters and into common code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55079 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify FastISel's constructor argument list, make the FastISelDan Gohman2008-08-201-5/+3
| | | | | | | | | class hold a MachineRegisterInfo member, and make the MachineBasicBlock be passed in to SelectInstructions rather than the FastISel constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the string for MVT::isVoid.Dan Gohman2008-08-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55034 91177308-0d34-0410-b5e6-96231b3b80d8
* For now, restrict FastISel to instructions that only involve oneDan Gohman2008-08-191-2/+6
| | | | | | | register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55008 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out the code to scan an instruction's operands into aDan Gohman2008-08-191-26/+36
| | | | | | | helper function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55007 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more comments.Dan Gohman2008-08-191-1/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55004 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix indentation in FastISel tablegen-emitted code.Dan Gohman2008-08-191-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55003 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more checking to filter out more kinds of things thatDan Gohman2008-08-191-1/+11
| | | | | | | FastISel doesn't support yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55002 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 columns.Dan Gohman2008-08-191-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54998 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a few doxygen comments.Dan Gohman2008-08-191-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54997 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an unneeded #include.Dan Gohman2008-08-191-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54996 91177308-0d34-0410-b5e6-96231b3b80d8
* Compress manpages.Devang Patel2008-08-191-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54971 91177308-0d34-0410-b5e6-96231b3b80d8
* Speed up addRegisterDead by adding more fast checks before performing the ↵Owen Anderson2008-08-141-3/+9
| | | | | | | | | | expensive subregister query, and by increasing the size of the subregister hashtable so that there are fewer collisions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54781 91177308-0d34-0410-b5e6-96231b3b80d8
* Update makellvm to return correct result code.Daniel Dunbar2008-08-131-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54756 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial checkin of the new "fast" instruction selection support. SeeDan Gohman2008-08-133-0/+407
| | | | | | | | the comments in FastISelEmitter.cpp for details on what this is. This is currently experimental and unusable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops, check in these files too, for the FastISel -> Fast rename.Dan Gohman2008-08-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
* remove obsolete filesChris Lattner2008-08-111-7/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54630 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ARM to the targets to build.Bill Wendling2008-08-051-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54386 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for overloading intrinsics (atomics) based on pointersMon P Wang2008-07-305-9/+26
| | | | | | | | to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't build with 4.0.Bill Wendling2008-07-281-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54137 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-76/+76
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
* 'Previously, the emacs tablegen mode would highlight constants even if Chris Lattner2008-07-231-4/+4
| | | | | | | | | | | they appear in words. This would cause things like the "128" in "VR128" to be highlighted. This patch fixes the highlighting by only recognizing constants when they have word breaks around them.' Patch by Stefanus Du Toit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53944 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporary hack to build with GCC 4.0 instead of 4.2.Bill Wendling2008-07-211-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53860 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-42/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
* Porting r53478 into mainline:Bill Wendling2008-07-111-0/+8
| | | | | | | Update to build_llvm. Don't output a floating point number for the version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53484 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetRegisterDesc::Name field is the same as the abstract register name. ↵Evan Cheng2008-07-071-10/+1
| | | | | | There is no need for targets to specify register names in addition to their AsmName's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53207 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the tablegen DAGISelEmitter code for outputing calls toDan Gohman2008-07-071-201/+208
| | | | | | | | | | | | | | | | | | getTargetNode and SelectNodeTo to reduce duplication, and to make some of the getTargetNode code available to SelectNodeTo. Use SelectNodeTo instead of getTargetNode in several new interesting cases, as it mutates nodes in place instead of creating new ones. This triggers some scheduling behavior differences due to nodes being presented to the scheduler in a different order. Some of the arbitrary scheduling decisions it makes are now arbitrarily made differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll, where a trivial scheduling difference led to a trivial register allocation difference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53203 91177308-0d34-0410-b5e6-96231b3b80d8
* Add explicit keywords.Dan Gohman2008-07-071-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
* isel load folding is disabled at -fast. Now hoist the check up to the top ↵Evan Cheng2008-07-031-8/+27
| | | | | | level to save some time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53096 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace a few uses of SelectionDAG::getTargetNode withDan Gohman2008-07-021-13/+28
| | | | | | | | | | | | | SelectionDAG::SelectNodeTo in the instruction selector. This updates existing nodes in place instead of creating new ones. Go back to selecting ISD::DBG_LABEL nodes into TargetInstrInfo::DBG_LABEL nodes instead of leaving them unselected, now that SelectNodeTo allows us to update them in place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the subregister hashtable output more readable by wrapping the lines,Owen Anderson2008-07-011-12/+16
| | | | | | | and mark it const along with the associated changes to TargetRegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52966 91177308-0d34-0410-b5e6-96231b3b80d8
* Use delete[] instead of free on an array created with new[].Owen Anderson2008-07-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52960 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement suggestions from Chris:Owen Anderson2008-07-011-9/+10
| | | | | | | | | - Use a more accurate heuristic for the size of the hashtable. - Use bitwise and instead of modulo since the size is a power of two. - Use new[] instead of malloc(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52951 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace the dynamically computed std::set lookup method for subregisters ↵Owen Anderson2008-07-011-1/+68
| | | | | | | | | with a hashtable-based version that is computed by tblgen at the time LLVM is compiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52945 91177308-0d34-0410-b5e6-96231b3b80d8
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-015-26/+33
| | | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.Evan Cheng2008-06-301-22/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52892 91177308-0d34-0410-b5e6-96231b3b80d8
* check in anton's patch to make inlining happen in a determinstic orderChris Lattner2008-06-301-4/+6
| | | | | | | | and fix the bug that it uncovers: inlining a pattern fragment could bring in other pattern fragments if the inlinee hadn't already been inlined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52888 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes the last x86-64 test failure in compat.exp:Dale Johannesen2008-06-261-0/+2
| | | | | | | | | | | | | | | <16 x float> is 64-byte aligned (for some reason), which gets us into the stack realignment code. The computation changing FP-relative offsets to SP-relative was broken, assiging a spill temp to a location also used for parameter passing. This fixes it by rounding up the stack frame to a multiple of the largest alignment (I concluded it wasn't fixable without doing this, but I'm not very sure.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52750 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-254-6/+10
| | | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for building on solaris, working around namespaceChris Lattner2008-06-241-1/+1
| | | | | | | polution problems from system headers. Patch by Nathan Keynes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52682 91177308-0d34-0410-b5e6-96231b3b80d8
* Extract the x86_64 part for the executables.Bill Wendling2008-06-231-5/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52647 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add "Commutative" property to intrinsics. This allows tblgen to generate ↵Evan Cheng2008-06-164-5/+42
| | | | | | | | | the commuted variants for dagisel matching code. - Mark lots of X86 intrinsics as "Commutative" to allow load folding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some debug output from tblgen. This fixes a test.Matthijs Kooijman2008-06-101-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52177 91177308-0d34-0410-b5e6-96231b3b80d8
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