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* Soften the pattern-can-never-match error in TableGen into a warning. This pat...Owen Anderson2012-09-191-2/+5
* Remove code for setting the VEX L-bit as a function of operand size from the ...Craig Topper2012-09-192-19/+2
* SchedMachineModel: compress the CPU's WriteLatencyTable.Andrew Trick2012-09-193-7/+44
* Iterate deterministicaly over ClassInfo*'sSean Silva2012-09-191-2/+12
* Iterate deterministically over register classesSean Silva2012-09-191-2/+3
* Refactor Record* by-ID comparator to Record.hSean Silva2012-09-192-18/+9
* FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character ...Benjamin Kramer2012-09-181-2/+2
* Make custom operand parsing mnemonic indices use the same mnemonic table as t...Craig Topper2012-09-181-34/+39
* Use variable type for index into mnemonic table. Shrinks size of index field ...Craig Topper2012-09-181-5/+14
* Replaced ReInitMCSubtargetInfo with InitMCProcessor.Andrew Trick2012-09-181-1/+2
* comment typoAndrew Trick2012-09-181-1/+1
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-182-11/+1
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...Andrew Trick2012-09-181-0/+84
* TableGen subtarget emitter. Remove unnecessary header dependence.Andrew Trick2012-09-181-0/+1
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-181-6/+25
* Mark asm matcher conversion table as const.Craig Topper2012-09-181-5/+5
* Fix typo in comment. No functional change.Craig Topper2012-09-181-1/+1
* Backout the wrong subtarget emitter fixAndrew Trick2012-09-171-1/+1
* Fix release build after revertingAndrew Trick2012-09-171-2/+1
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-173-113/+20
* InitMCProcessorAndrew Trick2012-09-171-1/+2
* comment typoAndrew Trick2012-09-171-1/+1
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-172-11/+1
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...Andrew Trick2012-09-171-0/+84
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-171-7/+25
* TableGen subtarget emitter. Format and emit data tables for the new machine m...Andrew Trick2012-09-171-6/+117
* TableGen subtarget emitter. Generate data tables for the new machine model.Andrew Trick2012-09-171-2/+291
* TableGen subtarget emitter. Emit processor resources for the new machine model.Andrew Trick2012-09-171-10/+63
* TableGen subtarget parser: Add getProcResourcesIdx().Andrew Trick2012-09-171-0/+10
* TableGen: Add initializer.Jim Grosbach2012-09-171-1/+1
* Fix a few vars that can end up being used without initialization.Axel Naumann2012-09-171-1/+1
* Fix typoMichael Liao2012-09-171-1/+1
* Add 'virtual' keywoards to output file for overridden functions.Craig Topper2012-09-161-5/+6
* Add 'virtual' keywoards to output file for overridden functions.Craig Topper2012-09-161-7/+7
* Fix Doxygen issues: wrap code examples in \code and use \p to refer toDmitri Gribenko2012-09-151-4/+4
* Revert r163878 as it breaks on targets with alternate register names. Such ta...Craig Topper2012-09-152-6/+4
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-152-0/+219
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-152-0/+512
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-153-137/+816
* Allow the second opcode info table to be 8, 16, or 32-bits as needed to repre...Craig Topper2012-09-141-38/+32
* Reduce size of register name index tables by using uint16_t for all in tree t...Craig Topper2012-09-142-4/+6
* AsmWriterEmitter: OpInfo2 should be unsigned 16-bit.Manman Ren2012-09-131-1/+1
* AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit toManman Ren2012-09-131-11/+46
* Fix Doxygen issues:Dmitri Gribenko2012-09-132-20/+21
* Add a new compression type to ModRM table that detects when the memory modRM ...Craig Topper2012-09-131-2/+15
* TableGen: Convert an assert() to a proper diagnostic.Jim Grosbach2012-09-121-1/+3
* Fix a couple of Doxygen comment issues pointed out by -Wdocumentation.Dmitri Gribenko2012-09-121-20/+21
* Improve tblgen code cleanliness: create an unknown_class, from which the unkn...Owen Anderson2012-09-112-3/+3
* Compute a map from register names to registers, rather than scanning the list...Owen Anderson2012-09-113-6/+15
* Add TRI::getSubRegIndexLaneMask().Jakob Stoklund Olesen2012-09-113-6/+68