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* Clean up includes.Craig Topper2012-07-271-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160852 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate the large XXXSubRegTable constant arrays.Jakob Stoklund Olesen2012-07-271-53/+31
| | | | | | | | | | | These tables were indexed by [register][subreg index] which made them, very large and sparse. Replace them with lists of sub-register indexes that match the existing lists of sub-registers. MCRI::getSubReg() becomes a very short linear search, like getSubRegIndex() already was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160843 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for 'CompositeIndices' and sub-register cycles.Jakob Stoklund Olesen2012-07-261-52/+19
| | | | | | | | | | | | Now that the weird X86 sub_ss and sub_sd sub-register indexes are gone, there is no longer a need for the CompositeIndices construct in .td files. Sub-register index composition can be specified on the SubRegIndex itself using the ComposedOf field. Also enforce unique names for sub-registers in TableGen. The same sub-register cannot be available with multiple sub-register indexes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160842 91177308-0d34-0410-b5e6-96231b3b80d8
* Make l/q suffixes on AVX forms of scalar convert instructions consistent ↵Craig Topper2012-07-261-2/+1
| | | | | | with their non-AVX forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160775 91177308-0d34-0410-b5e6-96231b3b80d8
* Differentially encode all MC register lists.Jakob Stoklund Olesen2012-07-251-44/+30
| | | | | | | This simplifies MCRegisterInfo and shrinks the target descriptions a bit more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160758 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a "Bad fd number" error on some platforms due to a less portableEric Christopher2012-07-231-1/+1
| | | | | | | | redirection in the system call. Patch by Andy Gibbs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160644 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo (the the => the)Sylvestre Ledru2012-07-234-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160621 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Use close_fds=True on UNIX, to avoid file descriptor pollution ofDaniel Dunbar2012-07-201-1/+5
| | | | | | subprocesses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160556 91177308-0d34-0410-b5e6-96231b3b80d8
* Move around some enum elements so that lastMRM corrects gets assigned 56, whichRichard Trieu2012-07-181-2/+2
| | | | | | | | is one more that MRM_DF which is 55. Previously, it held value 45, the same as MRM_D0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160465 91177308-0d34-0410-b5e6-96231b3b80d8
* TblGen: Tweak to pretty-print DAGISel.inc a bit better.Jim Grosbach2012-07-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160463 91177308-0d34-0410-b5e6-96231b3b80d8
* Make x86 asm parser to check for xmm vs ymm for index register in gather ↵Craig Topper2012-07-182-6/+13
| | | | | | instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Pattern<> references to null_frag are a nop.Jim Grosbach2012-07-171-0/+5
| | | | | | | | A standalone pattern defined in a multiclass expansion should handle null_frag references just like patterns on instructions. Follow-up to r160333. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160384 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Allow conditional instruction pattern in multiclass.Jim Grosbach2012-07-171-2/+36
| | | | | | | | | | | | | | | | | | | Define a 'null_frag' SDPatternOperator node, which if referenced in an instruction Pattern, results in the pattern being collapsed to be as-if '[]' had been specified instead. This allows supporting a multiclass definition where some instaniations have ISel patterns associated and others do not. For example, multiclass myMulti<RegisterClass rc, SDPatternOperator OpNode = null_frag> { def _x : myI<(outs rc:), (ins rc:), []>; def _r : myI<(outs rc:), (ins rc:), [(set rc:, (OpNode rc:))]>; } defm foo : myMulti<GRa, not>; defm bar : myMulti<GRb>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160333 91177308-0d34-0410-b5e6-96231b3b80d8
* Defer checking for registers in the MC AsmMatcher until the after ↵Owen Anderson2012-07-161-16/+16
| | | | | | user-defined match classes have been checked. This allows the creation of MatchClass's that are supersets of a register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160327 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Assembly matcher 'insufficient operands' diagnostic.Jim Grosbach2012-07-121-0/+1
| | | | | | | | | | Make sure the tblgen'erated asm matcher correctly returns numoperands+1 as the ErrorInfo when the problem was that there weren't enough operands specified. rdar://9142751 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160144 91177308-0d34-0410-b5e6-96231b3b80d8
* Update GATHER instructions to support 2 read-write operands. Patch from ↵Craig Topper2012-07-122-14/+14
| | | | | | myself and Manman Ren. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160110 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine model: allow itineraries to be shared by different processor models.Andrew Trick2012-07-091-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159959 91177308-0d34-0410-b5e6-96231b3b80d8
* I'm introducing a new machine model to simultaneously allow simpleAndrew Trick2012-07-077-229/+508
| | | | | | | | | | | | | | | | | | | | | | | subtarget CPU descriptions and support new features of MachineScheduler. MachineModel has three categories of data: 1) Basic properties for coarse grained instruction cost model. 2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD). 3) Instruction itineraties for detailed per-cycle reservation tables. These will all live side-by-side. Any subtarget can use any combination of them. Instruction itineraries will not change in the near term. In the long run, I expect them to only be relevant for in-order VLIW machines that have complex contraints and require a precise scheduling/bundling model. Once itineraries are only actively used by VLIW-ish targets, they could be replaced by something more appropriate for those targets. This tablegen backend rewrite sets things up for introducing MachineModel type #2: per opcode/operand cost model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-07-071-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159890 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak spelling.Andrew Trick2012-07-071-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159889 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r159528 which taught lit's builtin shell test runner about theChandler Carruth2012-07-021-15/+4
| | | | | | | | | | '|&' bash syntax. We have lots of users with a bash on their system which doesn't support this syntax, and as bash is still significantly faster, we should support them. The test suite has already been updated to cope with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159580 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the C++11 build. I hate narrowing conversions.Chandler Carruth2012-07-021-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159543 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-07-021-1/+1
| | | | | | Reapplies r159406 with minor cleanup. The regressions appear to have been spurious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159541 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the built-in shell test runner in lit to handle '|&'-style pipes.Chandler Carruth2012-07-021-4/+15
| | | | | | | This is directly cloned from the logic in the TCL test bits of lit. Hopefully will fix most of the windows build bot fallout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159528 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-06-291-1/+1
| | | | | | This reverts commit r159406. I noticed a performance regression so I'll back out for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159411 91177308-0d34-0410-b5e6-96231b3b80d8
* Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick2012-06-291-1/+1
| | | | | | | | | | | | | | The TargetInstrInfo::getNumMicroOps API does not change, but soon it will be used by MachineScheduler. Now each subtarget can specify the number of micro-ops per itinerary class. For ARM, this is currently always dynamic (-1), because it is used for load/store multiple which depends on the number of register operands. Zero is now a valid number of micro-ops. This can be used for nop pseudo-instructions or instructions that the hardware can squash during dispatch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159406 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Windows build after r159281: s/iterator/const_iteratorAlexey Samsonov2012-06-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159334 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence unused variable warning.Richard Trieu2012-06-281-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159316 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor and speed up DFA generator.Anshuman Dasgupta2012-06-271-21/+48
| | | | | | | Patch by Ivan Llopard! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159281 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: AsmMatcher diagnostics preference detail.Jim Grosbach2012-06-261-1/+3
| | | | | | | Don't override a custom diagnostic w/ a generic InvalidOperand, all else being equal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159238 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-262-0/+6
| | | | | | | | | | | | | Support the following intrinsics: llvm.x86.avx2.gather.d.pd, llvm.x86.avx2.gather.q.pd llvm.x86.avx2.gather.d.pd.256, llvm.x86.avx2.gather.q.pd.256 llvm.x86.avx2.gather.d.ps, llvm.x86.avx2.gather.q.ps llvm.x86.avx2.gather.d.ps.256, llvm.x86.avx2.gather.q.ps.256 Modified Disassembler to handle VSIB addressing mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159221 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach TableGen to put chains on more instructionsTim Northover2012-06-261-0/+7
| | | | | | | | | | | | When generating selection tables for Pat instances, TableGen relied on an output Instruction's Pattern field being set to infer whether a chain should be added. This patch adds additional logic to check various flag fields so that correct code can be generated even if Pattern is unset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159217 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Eric Christopher2012-06-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159178 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: AsmMatcher support for better operand diagnostics.Jim Grosbach2012-06-221-16/+69
| | | | | | | | | | | | | "Invalid operand" may be a completely correct diagnostic, but it's often insufficiently specific to really help identify and fix the problem in assembly source. Allow a target to specify a more-specific diagnostic kind for each AsmOperandClass derived definition and use that to provide more detailed diagnostics when an operant of that class resulted in a match failure. rdar://8987109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159050 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r158679 - use case is unclear (and it increases the memory footprint).Hal Finkel2012-06-221-2/+2
| | | | | | | | | | Original commit message: Allow up to 64 functional units per processor itinerary. This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159027 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting makefile change wile I figure out what the heck happenedMarshall Clow2012-06-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159017 91177308-0d34-0410-b5e6-96231b3b80d8
* Added building yaml2obj to the configure+make build systemMarshall Clow2012-06-222-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159014 91177308-0d34-0410-b5e6-96231b3b80d8
* Use "NoItineraries" for processors with no itineraries.Andrew Trick2012-06-221-37/+41
| | | | | | | | This makes it explicit when ScoreboardHazardRecognizer will be used. "GenericItineraries" would only make sense if it contained real itinerary values and still required ScoreboardHazardRecognizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158963 91177308-0d34-0410-b5e6-96231b3b80d8
* New test tool: obj2yamlMarshall Clow2012-06-195-0/+512
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158730 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow up to 64 functional units per processor itinerary.Hal Finkel2012-06-181-2/+2
| | | | | | | This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158679 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: AsmMatcher missing-features list minimization.Jim Grosbach2012-06-181-3/+9
| | | | | | | | | When returning a 'cannot match due to missing CPU features' error code, if there are multiple potential matches with different feature sets, return the smallest set of missing features from the alternatives as that's most likely to be the one that's desired. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158673 91177308-0d34-0410-b5e6-96231b3b80d8
* Add two newlines in ParseSubtargetFeatures's debug output after the CPU is ↵Hal Finkel2012-06-121-1/+1
| | | | | | | | | printed. There is otherwise not a newline between the CPU name and the start of the next pass's output which makes both difficult to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158350 91177308-0d34-0410-b5e6-96231b3b80d8
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-1132-1081/+904
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8
* Sched itinerary fix: Avoid static initializers.Andrew Trick2012-06-081-2/+1
| | | | | | | | This fixes an accidental dependence on static initialization order that I introduced yesterday. Thank you Lang!!! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158215 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a ↵Owen Anderson2012-06-082-5/+27
| | | | | | complex operand are called out explicitly in the asm string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158183 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead private member variables from gtest.Benjamin Kramer2012-06-062-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158101 91177308-0d34-0410-b5e6-96231b3b80d8
* Round 2 of dead private variable removal.Benjamin Kramer2012-06-061-2/+1
| | | | | | | | LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-062-2/+1
| | | | | | | | There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix gtest build issue on Visual Studio 2012 RCJustin Holewinski2012-06-061-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158046 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Added MultiIssueItineraries.Andrew Trick2012-06-052-1/+33
| | | | | | | | This allows a subtarget to explicitly specify the issue width and other properties without providing pipeline stage details for every instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157979 91177308-0d34-0410-b5e6-96231b3b80d8
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