| Commit message (Collapse) | Author | Age | Files | Lines |
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Make sure VarInits are unique and created only once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136497 91177308-0d34-0410-b5e6-96231b3b80d8
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Make sure TernOpInits are unique and created only once. This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136496 91177308-0d34-0410-b5e6-96231b3b80d8
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Make sure BinOpInits are unique and created only once. This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136495 91177308-0d34-0410-b5e6-96231b3b80d8
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Make sure UnOpInits are unique and created only once. This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136494 91177308-0d34-0410-b5e6-96231b3b80d8
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Ensure ListInits are unique and only created once. This will be
important for AVX as lists will be used extensively to pass generic
patterns, prefix information and other things to lower-level
pattern-generation classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136493 91177308-0d34-0410-b5e6-96231b3b80d8
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Use a StringMap to ensure CodeInits are unique and created only
once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136492 91177308-0d34-0410-b5e6-96231b3b80d8
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Use a StringMap to ensure the StringInits are unique. This is
especially important for AVX where we will have many smallish
strings representing instruction prefixes, suffixes and the like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136491 91177308-0d34-0410-b5e6-96231b3b80d8
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Use a DenseMap to make sure only one IntInit of any value exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136490 91177308-0d34-0410-b5e6-96231b3b80d8
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Make BitsInit a FoldingSetNode so we can unique it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136489 91177308-0d34-0410-b5e6-96231b3b80d8
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Keep only two copies of BitInit: one for true and one for false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136488 91177308-0d34-0410-b5e6-96231b3b80d8
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Keep only one UnsetInit around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136487 91177308-0d34-0410-b5e6-96231b3b80d8
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Replace uses of new *Init with *Init::get. This hides the allocation
implementation so that we can unique Inits in various ways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136486 91177308-0d34-0410-b5e6-96231b3b80d8
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Make references to Inits const everywhere. This is the final step
before making them unique.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
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Remove all non-const iterators from Init classes. This is another
step toward constifying Inits and ultimately turning them into
FoldingSetNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136484 91177308-0d34-0410-b5e6-96231b3b80d8
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Get rid of all Init members that modify internal state. This is in
preparation for making references to Inits const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136483 91177308-0d34-0410-b5e6-96231b3b80d8
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Add a getValues ListInit method to return the sequence of values in
the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136482 91177308-0d34-0410-b5e6-96231b3b80d8
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Create a std::string wrapper for use as a DenseMap key. DenseMap is
not safe in generate with strings, so this wrapper indicates that only
strings guaranteed not to have certain values should be used in the
DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136481 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136478 91177308-0d34-0410-b5e6-96231b3b80d8
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overwrite our mapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136467 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136431 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136405 91177308-0d34-0410-b5e6-96231b3b80d8
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Clang side
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136390 91177308-0d34-0410-b5e6-96231b3b80d8
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This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.
rdar://8204588
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
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llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored. The others remain unchanged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136287 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136215 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136212 91177308-0d34-0410-b5e6-96231b3b80d8
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for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136141 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8
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MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
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the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135841 91177308-0d34-0410-b5e6-96231b3b80d8
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should be faster and smaller.
Goodbye static ctors and dtors!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135836 91177308-0d34-0410-b5e6-96231b3b80d8
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access its data.
This makes TargetRegisterClass slightly slower. Next step will be making contains faster.
Eventually TargetRegisterClass will be killed entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135835 91177308-0d34-0410-b5e6-96231b3b80d8
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The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield.
Update the representation such that we store the operand as 0-31, allowing us
to remove the encoder method and the special case handling in the disassembler.
Update the assembly parser and the instruction printer accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135823 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135816 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135768 91177308-0d34-0410-b5e6-96231b3b80d8
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- This currently introduces more instances of the static DenseSet dtor, but that should be fixable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135735 91177308-0d34-0410-b5e6-96231b3b80d8
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necessitates a lot of changes to related bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135722 91177308-0d34-0410-b5e6-96231b3b80d8
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allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8
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to for it to be an an anon namespace and be in a header.
Eliminate some extraenous uses of tie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135669 91177308-0d34-0410-b5e6-96231b3b80d8
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Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135626 91177308-0d34-0410-b5e6-96231b3b80d8
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decoders for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135524 91177308-0d34-0410-b5e6-96231b3b80d8
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
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multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
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to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
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Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135414 91177308-0d34-0410-b5e6-96231b3b80d8
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Make all of the RecTy constructors private, and use get() factory
methods instead. Return singleton instances when it makes sense.
ListTy instance pointers are stored in the element RecTy instance.
BitsRecTy instance pointers, one per length, are stored in a static vector.
Also unique DefInit instances. A Record has a unique DefInit which
has a unique RecordRecTy instance.
This saves some 200k-300k RecTy allocations when parsing ARM.td. It
reduces TableGen's heap usage by almost 50%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135399 91177308-0d34-0410-b5e6-96231b3b80d8
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previously explicit non-default constructors were used.
Mostly mechanical with some manual reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135390 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135343 91177308-0d34-0410-b5e6-96231b3b80d8
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in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135337 91177308-0d34-0410-b5e6-96231b3b80d8
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